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Commit d444af2d authored by Alex Deucher's avatar Alex Deucher
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drm/radeon/dpm: simplify state adjust logic for NI 



This is based on a similar patch from Alexandre Demers.
While fixing up some warnings with that patch I saw some
additional cleanups that could be applied.  This patch
simplifies the logic for patching the power state.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: Alexandre Demers <alexandre.f.demers@gmail.com>
parent 9c57a6bd

drivers/gpu/drm/radeon/ni_dpm.c

+11 −17
Original line number Diff line number Diff line
@@ -785,8 +785,8 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev, 
	struct ni_ps *ps = ni_get_ps(rps);

	struct radeon_clock_and_voltage_limits *max_limits;

	bool disable_mclk_switching;

	u32 mclk, sclk;

	u16 vddc, vddci;

	u32 mclk;

	u16 vddci;

	u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;

	int i;
@@ -839,24 +839,14 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev, 


	/* XXX validate the min clocks required for display */



	/* adjust low state */

	if (disable_mclk_switching) {

		mclk  = ps->performance_levels[ps->performance_level_count - 1].mclk;

		sclk = ps->performance_levels[0].sclk;

		vddc = ps->performance_levels[0].vddc;

		vddci = ps->performance_levels[ps->performance_level_count - 1].vddci;

	} else {

		sclk = ps->performance_levels[0].sclk;

		mclk = ps->performance_levels[0].mclk;

		vddc = ps->performance_levels[0].vddc;

		vddci = ps->performance_levels[0].vddci;

		ps->performance_levels[0].mclk =

			ps->performance_levels[ps->performance_level_count - 1].mclk;

		ps->performance_levels[0].vddci =

			ps->performance_levels[ps->performance_level_count - 1].vddci;

	}



	/* adjusted low state */

	ps->performance_levels[0].sclk = sclk;

	ps->performance_levels[0].mclk = mclk;

	ps->performance_levels[0].vddc = vddc;

	ps->performance_levels[0].vddci = vddci;



	btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk,

				  &ps->performance_levels[0].sclk,

				  &ps->performance_levels[0].mclk);
@@ -868,11 +858,15 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev, 
			ps->performance_levels[i].vddc = ps->performance_levels[i - 1].vddc;

	}



	/* adjust remaining states */

	if (disable_mclk_switching) {

		mclk = ps->performance_levels[0].mclk;

		vddci = ps->performance_levels[0].vddci;

		for (i = 1; i < ps->performance_level_count; i++) {

			if (mclk < ps->performance_levels[i].mclk)

				mclk = ps->performance_levels[i].mclk;

			if (vddci < ps->performance_levels[i].vddci)

				vddci = ps->performance_levels[i].vddci;

		}

		for (i = 0; i < ps->performance_level_count; i++) {

			ps->performance_levels[i].mclk = mclk;