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Commit cedb655a authored by Alex Deucher's avatar Alex Deucher
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drm/radeon: handle broken disabled rb mask gracefully 



If the disabled rb mask register is not properly initialized
program a sane default based on the number of RBs for the
asic.  This avoids a potential divide by 0 when calculating
the backend mask.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 55b615ae

drivers/gpu/drm/radeon/evergreen.c

+8 −0
Original line number Diff line number Diff line
@@ -2261,6 +2261,14 @@ static void evergreen_gpu_init(struct radeon_device *rdev) 
	}

	/* enabled rb are just the one not disabled :) */

	disabled_rb_mask = tmp;

	tmp = 0;

	for (i = 0; i < rdev->config.evergreen.max_backends; i++)

		tmp |= (1 << i);

	/* if all the backends are disabled, fix it up here */

	if ((disabled_rb_mask & tmp) == tmp) {

		for (i = 0; i < rdev->config.evergreen.max_backends; i++)

			disabled_rb_mask &= ~(1 << i);

	}



	WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES);

	WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES);

drivers/gpu/drm/radeon/ni.c

+8 −0
Original line number Diff line number Diff line
@@ -615,6 +615,14 @@ static void cayman_gpu_init(struct radeon_device *rdev) 
	}

	/* enabled rb are just the one not disabled :) */

	disabled_rb_mask = tmp;

	tmp = 0;

	for (i = 0; i < (rdev->config.cayman.max_backends_per_se * rdev->config.cayman.max_shader_engines); i++)

		tmp |= (1 << i);

	/* if all the backends are disabled, fix it up here */

	if ((disabled_rb_mask & tmp) == tmp) {

		for (i = 0; i < (rdev->config.cayman.max_backends_per_se * rdev->config.cayman.max_shader_engines); i++)

			disabled_rb_mask &= ~(1 << i);

	}



	WREG32(GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES);

	WREG32(RLC_GFX_INDEX, INSTANCE_BROADCAST_WRITES | SE_BROADCAST_WRITES);