Merge branch 'misc' into devel

fffe0000	fffeffff	XScale cache flush area.  This is used

				in proc-xscale.S to flush the whole data

				cache.  Free for other usage on non-XScale.

				cache. (XScale does not have TCM.)

fffe8000	fffeffff	DTCM mapping area for platforms with

				DTCM mounted inside the CPU.

fffe0000	fffe7fff	ITCM mapping area for platforms with

				ITCM mounted inside the CPU.

fff00000	fffdffff	Fixmap mapping region.  Addresses provided

				by fix_to_virt() will be located here.

system control coprocessor. Documentation from ARM can be found

at http://infocenter.arm.com, search for "TCM Status Register"

to see documents for all CPUs. Reading this register you can

determine if ITCM (bit 0) and/or DTCM (bit 16) is present in the

machine.

determine if ITCM (bits 1-0) and/or DTCM (bit 17-16) is present

in the machine.

There is further a TCM region register (search for "TCM Region

Registers" at the ARM site) that can report and modify the location

the MMU, but notice that the TCM if often used in situations where

the MMU is turned off. To avoid confusion the current Linux

implementation will map the TCM 1 to 1 from physical to virtual

memory in the location specified by the machine.

memory in the location specified by the kernel. Currently Linux

will map ITCM to 0xfffe0000 and on, and DTCM to 0xfffe8000 and

on, supporting a maximum of 32KiB of ITCM and 32KiB of DTCM.

Newer versions of the region registers also support dividing these

TCMs in two separate banks, so for example an 8KiB ITCM is divided

into two 4KiB banks with its own control registers. The idea is to

be able to lock and hide one of the banks for use by the secure

world (TrustZone).

TCM is used for a few things:

  memory. Such a heap is great for things like saving

  device state when shutting off device power domains.

A machine that has TCM memory shall select HAVE_TCM in

arch/arm/Kconfig for itself, and then the

rest of the functionality will depend on the physical

location and size of ITCM and DTCM to be defined in

mach/memory.h for the machine. Code that needs to use

TCM shall #include <asm/tcm.h> If the TCM is not located

at the place given in memory.h it will be moved using

the TCM Region registers.

A machine that has TCM memory shall select HAVE_TCM from

arch/arm/Kconfig for itself. Code that needs to use TCM shall

#include <asm/tcm.h>

Functions to go into itcm can be tagged like this:

int __tcmfunc foo(int bar);

Since these are marked to become long_calls and you may want

to have functions called locally inside the TCM without

wasting space, there is also the __tcmlocalfunc prefix that

will make the call relative.

Variables to go into dtcm can be tagged like this:

int __tcmdata foo;

config GENERIC_CLOCKEVENTS_BROADCAST

	bool

	depends on GENERIC_CLOCKEVENTS

	default y if SMP && !LOCAL_TIMERS

	default y if SMP

config HAVE_TCM

	bool

	  disabled, perf events will use software events only.

config SPARSE_IRQ

	bool "Support sparse irq numbering"

	depends on EXPERIMENTAL

	def_bool n

	help

	  This enables support for sparse irqs. This is useful in general

	  as most CPUs have a fairly sparse array of IRQ vectors, which

	  number of off-chip IRQs will want to treat this as

	  experimental until they have been independently verified.

	  If you don't know what to do here, say N.

source "mm/Kconfig"

config FORCE_MAX_ZONEORDER

#define MT_MEMORY		9

#define MT_ROM			10

#define MT_MEMORY_NONCACHED	11

#define MT_MEMORY_DTCM		12

#define MT_MEMORY_ITCM		13

#ifdef CONFIG_MMU

extern void iotable_init(struct map_desc *, int);

#endif /* !CONFIG_MMU */

/*

 * We fix the TCM memories max 32 KiB ITCM resp DTCM at these

 * locations

 */

#ifdef CONFIG_HAVE_TCM

#define ITCM_OFFSET	UL(0xfffe0000)

#define DTCM_OFFSET	UL(0xfffe8000)

#endif

/*

 * Physical vs virtual RAM address space conversion.  These are

 * private definitions which should NOT be used outside memory.h