Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit cd88e3a6 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux 

Pull drm fixes from Dave Airlie:
 "As soon as I sent the non-urgent stack, two important fixes come in:

   - i915: fixes SNB GPU hangs in a number of 3D apps

   - radeon: initial fix for VGA on LLano system, 3 or 4 of us have
     spent time debugging this, and Jerome finally figured out the magic
     bit the BIOS/fglrx set that we didn't.  This at least should get
     things working, there may be future reliability fixes."

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
  drm/i915: Set the Stencil Cache eviction policy to non-LRA mode.
  drm/radeon/kms: need to set up ss on DP bridges as well
parents fcbf94b9 3a69ddd6

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -568,6 +568,7 @@ 
#define   CM0_MASK_SHIFT          16

#define   CM0_IZ_OPT_DISABLE      (1<<6)

#define   CM0_ZR_OPT_DISABLE      (1<<5)

#define	  CM0_STC_EVICT_DISABLE_LRA_SNB	(1<<5)

#define   CM0_DEPTH_EVICT_DISABLE (1<<4)

#define   CM0_COLOR_EVICT_DISABLE (1<<3)

#define   CM0_DEPTH_WRITE_DISABLE (1<<1)

drivers/gpu/drm/i915/intel_ringbuffer.c

+8 −0
Original line number Diff line number Diff line
@@ -401,6 +401,14 @@ static int init_render_ring(struct intel_ring_buffer *ring) 
	if (INTEL_INFO(dev)->gen >= 6) {

		I915_WRITE(INSTPM,

			   INSTPM_FORCE_ORDERING << 16 | INSTPM_FORCE_ORDERING);



		/* From the Sandybridge PRM, volume 1 part 3, page 24:

		 * "If this bit is set, STCunit will have LRA as replacement

		 *  policy. [...] This bit must be reset.  LRA replacement

		 *  policy is not supported."

		 */

		I915_WRITE(CACHE_MODE_0,

			   CM0_STC_EVICT_DISABLE_LRA_SNB << CM0_MASK_SHIFT);

	}



	return ret;

drivers/gpu/drm/radeon/atombios_crtc.c

+2 −2
Original line number Diff line number Diff line
@@ -958,8 +958,8 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode 
		break;

	}



	if (radeon_encoder->active_device &

	    (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) {

	if ((radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) ||

	    (radeon_encoder_get_dp_bridge_encoder_id(encoder) != ENCODER_OBJECT_ID_NONE)) {

		struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;

		struct drm_connector *connector =

			radeon_get_connector_for_encoder(encoder);