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Commit c2288d4d authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-nouveau-next' of... 

Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-fixes

Nothing too exciting, mostly fixes for ancient boards, but a pretty important fix for DP on some systems.

Thanks,
* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6:
  drm/nouveau: fix TTM_PL_TT memtype on pre-nv50
  drm/nv50/disp: use correct register to determine DP display bpp
  drm/nouveau/fb: use correct ram oclass for nv1a hardware
  drm/nv50/gr: add missing nv_error parameter priv
  drm/nouveau: fix ENG_RUNLIST register address
  drm/nv4c/bios: disallow retrieving from prom on nv4x igp's
  drm/nv4c/vga: decode register is in a different place on nv4x igp's
  drm/nv4c/mc: nv4x igp's have a different msi rearm register
  drm/nouveau: set irq_enabled manually
parents 42738c2b 34d59508

drivers/gpu/drm/nouveau/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -141,6 +141,7 @@ nouveau-y += core/subdev/mc/base.o 
nouveau-y += core/subdev/mc/nv04.o

nouveau-y += core/subdev/mc/nv40.o

nouveau-y += core/subdev/mc/nv44.o

nouveau-y += core/subdev/mc/nv4c.o

nouveau-y += core/subdev/mc/nv50.o

nouveau-y += core/subdev/mc/nv94.o

nouveau-y += core/subdev/mc/nv98.o

drivers/gpu/drm/nouveau/core/engine/device/nv40.c

+5 −5
Original line number Diff line number Diff line
@@ -311,7 +311,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;

		device->oclass[NVDEV_SUBDEV_THERM  ] = &nv40_therm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv1a_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv44_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv4c_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nv31_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv46_fb_oclass;
@@ -334,7 +334,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;

		device->oclass[NVDEV_SUBDEV_THERM  ] = &nv40_therm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv1a_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv44_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv4c_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nv31_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv4e_fb_oclass;
@@ -357,7 +357,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;

		device->oclass[NVDEV_SUBDEV_THERM  ] = &nv40_therm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv1a_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv44_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv4c_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nv31_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv46_fb_oclass;
@@ -380,7 +380,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;

		device->oclass[NVDEV_SUBDEV_THERM  ] = &nv40_therm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv1a_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv44_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv4c_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nv31_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv46_fb_oclass;
@@ -403,7 +403,7 @@ nv40_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_CLOCK  ] = &nv40_clock_oclass;

		device->oclass[NVDEV_SUBDEV_THERM  ] = &nv40_therm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv1a_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv44_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv4c_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nv31_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv46_fb_oclass;

drivers/gpu/drm/nouveau/core/engine/disp/nv50.c

+1 −1
Original line number Diff line number Diff line
@@ -1142,7 +1142,7 @@ nv50_disp_intr_unk20_2(struct nv50_disp_priv *priv, int head) 
	if (conf != ~0) {

		if (outp.location == 0 && outp.type == DCB_OUTPUT_DP) {

			u32 soff = (ffs(outp.or) - 1) * 0x08;

			u32 ctrl = nv_rd32(priv, 0x610798 + soff);

			u32 ctrl = nv_rd32(priv, 0x610794 + soff);

			u32 datarate;



			switch ((ctrl & 0x000f0000) >> 16) {

drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c

+1 −1
Original line number Diff line number Diff line
@@ -112,7 +112,7 @@ nve0_fifo_runlist_update(struct nve0_fifo_priv *priv, u32 engine) 


	nv_wr32(priv, 0x002270, cur->addr >> 12);

	nv_wr32(priv, 0x002274, (engine << 20) | (p >> 3));

	if (!nv_wait(priv, 0x002284 + (engine * 4), 0x00100000, 0x00000000))

	if (!nv_wait(priv, 0x002284 + (engine * 8), 0x00100000, 0x00000000))

		nv_error(priv, "runlist %d update timeout\n", engine);

	mutex_unlock(&nv_subdev(priv)->mutex);

}

drivers/gpu/drm/nouveau/core/engine/graph/nv50.c

+1 −1
Original line number Diff line number Diff line
@@ -539,7 +539,7 @@ nv50_priv_tp_trap(struct nv50_graph_priv *priv, int type, u32 ustatus_old, 
				ustatus &= ~0x04030000;

			}

			if (ustatus && display) {

				nv_error("%s - TP%d:", name, i);

				nv_error(priv, "%s - TP%d:", name, i);

				nouveau_bitfield_print(nv50_mpc_traps, ustatus);

				pr_cont("\n");

				ustatus = 0;