Commit b053940d authored Mar 07, 2014 by Vineet Gupta Committed by Linus Torvalds Mar 07, 2014

ARC: Use correct PTAG register for icache flush



This fixes a subtle issue with cache flush which could potentially cause
random userspace crashes because of stale icache lines.

This error crept in when consolidating the cache flush code

Fixes: bd12976c (ARC: cacheflush refactor #3: Unify the {d,i}cache)
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Cc: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org  # 3.13
Cc: arc-linux-dev@synopsys.com
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

parent e1aa17c7

arch/arc/mm/cache_arc700.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -282,7 +282,7 @@ static inline void __cache_line_loop(unsigned long paddr, unsigned long vaddr,
		#else
		/* if V-P const for loop, PTAG can be written once outside loop */
		if (full_page_op)
		write_aux_reg(ARC_REG_DC_PTAG, paddr);
		write_aux_reg(aux_tag, paddr);
		#endif

		while (num_lines-- > 0) {
		@@ -296,7 +296,7 @@ static inline void __cache_line_loop(unsigned long paddr, unsigned long vaddr,
		write_aux_reg(aux_cmd, vaddr);
		vaddr += L1_CACHE_BYTES;
		#else
		write_aux_reg(aux, paddr);
		write_aux_reg(aux_cmd, paddr);
		paddr += L1_CACHE_BYTES;
		#endif
		}