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Commit a9dd31b7 authored by Paul Walmsley's avatar Paul Walmsley
Browse files

Merge branches 'clock_fixes_3.4rc', 'clockdomain_fixes_3.4rc',... 

Merge branches 'clock_fixes_3.4rc', 'clockdomain_fixes_3.4rc', 'hsmmc_erratum_2_1_1_128_refine_3.4rc1', 'hwmod_data_fixes_a_3.4rc', 'hwmod_fixes_a2_3.4rc' and 'powerdomain_fixes_a_3.4rc' into omap-fixes-a2-for-3.4rc-branch
parents 5897a391 7a82ebd9 26c547fd 503d0ea2 4ce107cc 8b8c3c78

arch/arm/mach-omap2/clockdomains44xx_data.c

+1 −1
Original line number Diff line number Diff line
@@ -390,7 +390,7 @@ static struct clockdomain emu_sys_44xx_clkdm = { 
	.prcm_partition	  = OMAP4430_PRM_PARTITION,

	.cm_inst	  = OMAP4430_PRM_EMU_CM_INST,

	.clkdm_offs	  = OMAP4430_PRM_EMU_CM_EMU_CDOFFS,

	.flags		  = CLKDM_CAN_HWSUP,

	.flags		  = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_FORCE_WAKEUP,

};



static struct clockdomain l3_dma_44xx_clkdm = {

arch/arm/mach-omap2/hsmmc.c

+7 −0
Original line number Diff line number Diff line
@@ -506,6 +506,13 @@ static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo, 
	if (oh->dev_attr != NULL) {

		mmc_dev_attr = oh->dev_attr;

		mmc_data->controller_flags = mmc_dev_attr->flags;

		/*

		 * erratum 2.1.1.128 doesn't apply if board has

		 * a transceiver is attached

		 */

		if (hsmmcinfo->transceiver)

			mmc_data->controller_flags &=

				~OMAP_HSMMC_BROKEN_MULTIBLOCK_READ;

	}



	pdev = platform_device_alloc(name, ctrl_nr - 1);

arch/arm/mach-omap2/omap_hwmod.c

+38 −50
Original line number Diff line number Diff line
@@ -1477,6 +1477,11 @@ static int _reset(struct omap_hwmod *oh) 


	ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);



	if (oh->class->sysc) {

		_update_sysc_cache(oh);

		_enable_sysc(oh);

	}



	return ret;

}
@@ -1786,20 +1791,9 @@ static int _setup(struct omap_hwmod *oh, void *data) 
		return 0;

	}



	if (!(oh->flags & HWMOD_INIT_NO_RESET)) {

	if (!(oh->flags & HWMOD_INIT_NO_RESET))

		_reset(oh);



		/*

		 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.

		 * The _enable() function should be split to

		 * avoid the rewrite of the OCP_SYSCONFIG register.

		 */

		if (oh->class->sysc) {

			_update_sysc_cache(oh);

			_enable_sysc(oh);

		}

	}



	postsetup_state = oh->_postsetup_state;

	if (postsetup_state == _HWMOD_STATE_UNKNOWN)

		postsetup_state = _HWMOD_STATE_ENABLED;
@@ -1907,20 +1901,10 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) 
 */

int omap_hwmod_softreset(struct omap_hwmod *oh)

{

	u32 v;

	int ret;



	if (!oh || !(oh->_sysc_cache))

	if (!oh)

		return -EINVAL;



	v = oh->_sysc_cache;

	ret = _set_softreset(oh, &v);

	if (ret)

		goto error;

	_write_sysconfig(v, oh);



error:

	return ret;

	return _ocp_softreset(oh);

}



/**
@@ -2463,26 +2447,28 @@ int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh, 
 * @oh: struct omap_hwmod *

 *

 * Sets the module OCP socket ENAWAKEUP bit to allow the module to

 * send wakeups to the PRCM.  Eventually this should sets PRCM wakeup

 * registers to cause the PRCM to receive wakeup events from the

 * module.  Does not set any wakeup routing registers beyond this

 * point - if the module is to wake up any other module or subsystem,

 * that must be set separately.  Called by omap_device code.  Returns

 * -EINVAL on error or 0 upon success.

 * send wakeups to the PRCM, and enable I/O ring wakeup events for

 * this IP block if it has dynamic mux entries.  Eventually this

 * should set PRCM wakeup registers to cause the PRCM to receive

 * wakeup events from the module.  Does not set any wakeup routing

 * registers beyond this point - if the module is to wake up any other

 * module or subsystem, that must be set separately.  Called by

 * omap_device code.  Returns -EINVAL on error or 0 upon success.

 */

int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)

{

	unsigned long flags;

	u32 v;



	if (!oh->class->sysc ||

	    !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))

		return -EINVAL;



	spin_lock_irqsave(&oh->_lock, flags);



	if (oh->class->sysc &&

	    (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {

		v = oh->_sysc_cache;

		_enable_wakeup(oh, &v);

		_write_sysconfig(v, oh);

	}



	_set_idle_ioring_wakeup(oh, true);

	spin_unlock_irqrestore(&oh->_lock, flags);
@@ -2494,26 +2480,28 @@ int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) 
 * @oh: struct omap_hwmod *

 *

 * Clears the module OCP socket ENAWAKEUP bit to prevent the module

 * from sending wakeups to the PRCM.  Eventually this should clear

 * PRCM wakeup registers to cause the PRCM to ignore wakeup events

 * from the module.  Does not set any wakeup routing registers beyond

 * this point - if the module is to wake up any other module or

 * subsystem, that must be set separately.  Called by omap_device

 * code.  Returns -EINVAL on error or 0 upon success.

 * from sending wakeups to the PRCM, and disable I/O ring wakeup

 * events for this IP block if it has dynamic mux entries.  Eventually

 * this should clear PRCM wakeup registers to cause the PRCM to ignore

 * wakeup events from the module.  Does not set any wakeup routing

 * registers beyond this point - if the module is to wake up any other

 * module or subsystem, that must be set separately.  Called by

 * omap_device code.  Returns -EINVAL on error or 0 upon success.

 */

int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)

{

	unsigned long flags;

	u32 v;



	if (!oh->class->sysc ||

	    !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))

		return -EINVAL;



	spin_lock_irqsave(&oh->_lock, flags);



	if (oh->class->sysc &&

	    (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {

		v = oh->_sysc_cache;

		_disable_wakeup(oh, &v);

		_write_sysconfig(v, oh);

	}



	_set_idle_ioring_wakeup(oh, false);

	spin_unlock_irqrestore(&oh->_lock, flags);

arch/arm/mach-omap2/omap_hwmod_44xx_data.c

+28 −0
Original line number Diff line number Diff line
@@ -2996,6 +2996,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = { 
	&omap44xx_l4_abe__mcbsp1_dma,

};



static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = {

	{ .role = "pad_fck", .clk = "pad_clks_ck" },

	{ .role = "prcm_clk", .clk = "mcbsp1_sync_mux_ck" },

};



static struct omap_hwmod omap44xx_mcbsp1_hwmod = {

	.name		= "mcbsp1",

	.class		= &omap44xx_mcbsp_hwmod_class,
@@ -3012,6 +3017,8 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { 
	},

	.slaves		= omap44xx_mcbsp1_slaves,

	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcbsp1_slaves),

	.opt_clks	= mcbsp1_opt_clks,

	.opt_clks_cnt	= ARRAY_SIZE(mcbsp1_opt_clks),

};



/* mcbsp2 */
@@ -3071,6 +3078,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = { 
	&omap44xx_l4_abe__mcbsp2_dma,

};



static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = {

	{ .role = "pad_fck", .clk = "pad_clks_ck" },

	{ .role = "prcm_clk", .clk = "mcbsp2_sync_mux_ck" },

};



static struct omap_hwmod omap44xx_mcbsp2_hwmod = {

	.name		= "mcbsp2",

	.class		= &omap44xx_mcbsp_hwmod_class,
@@ -3087,6 +3099,8 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { 
	},

	.slaves		= omap44xx_mcbsp2_slaves,

	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcbsp2_slaves),

	.opt_clks	= mcbsp2_opt_clks,

	.opt_clks_cnt	= ARRAY_SIZE(mcbsp2_opt_clks),

};



/* mcbsp3 */
@@ -3146,6 +3160,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = { 
	&omap44xx_l4_abe__mcbsp3_dma,

};



static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = {

	{ .role = "pad_fck", .clk = "pad_clks_ck" },

	{ .role = "prcm_clk", .clk = "mcbsp3_sync_mux_ck" },

};



static struct omap_hwmod omap44xx_mcbsp3_hwmod = {

	.name		= "mcbsp3",

	.class		= &omap44xx_mcbsp_hwmod_class,
@@ -3162,6 +3181,8 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { 
	},

	.slaves		= omap44xx_mcbsp3_slaves,

	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcbsp3_slaves),

	.opt_clks	= mcbsp3_opt_clks,

	.opt_clks_cnt	= ARRAY_SIZE(mcbsp3_opt_clks),

};



/* mcbsp4 */
@@ -3200,6 +3221,11 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = { 
	&omap44xx_l4_per__mcbsp4,

};



static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = {

	{ .role = "pad_fck", .clk = "pad_clks_ck" },

	{ .role = "prcm_clk", .clk = "mcbsp4_sync_mux_ck" },

};



static struct omap_hwmod omap44xx_mcbsp4_hwmod = {

	.name		= "mcbsp4",

	.class		= &omap44xx_mcbsp_hwmod_class,
@@ -3216,6 +3242,8 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { 
	},

	.slaves		= omap44xx_mcbsp4_slaves,

	.slaves_cnt	= ARRAY_SIZE(omap44xx_mcbsp4_slaves),

	.opt_clks	= mcbsp4_opt_clks,

	.opt_clks_cnt	= ARRAY_SIZE(mcbsp4_opt_clks),

};



/*

arch/arm/mach-omap2/powerdomain.c

+7 −1
Original line number Diff line number Diff line
@@ -972,7 +972,13 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm) 


int pwrdm_state_switch(struct powerdomain *pwrdm)

{

	return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);

	int ret;



	ret = pwrdm_wait_transition(pwrdm);

	if (!ret)

		ret = _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);



	return ret;

}



int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)