C6X: headers

#include <generated/asm-offsets.h>

/*

 *  Port on Texas Instruments TMS320C6x architecture

 *

 *  Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated

 *  Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)

 *

 *  This program is free software; you can redistribute it and/or modify

 *  it under the terms of the GNU General Public License version 2 as

 *  published by the Free Software Foundation.

 */

#ifndef _ASM_C6X_BITOPS_H

#define _ASM_C6X_BITOPS_H

#ifdef __KERNEL__

#include <linux/bitops.h>

#include <asm/system.h>

#include <asm/byteorder.h>

/*

 * clear_bit() doesn't provide any barrier for the compiler.

 */

#define smp_mb__before_clear_bit() barrier()

#define smp_mb__after_clear_bit()  barrier()

/*

 * We are lucky, DSP is perfect for bitops: do it in 3 cycles

 */

/**

 * __ffs - find first bit in word.

 * @word: The word to search

 *

 * Undefined if no bit exists, so code should check against 0 first.

 * Note __ffs(0) = undef, __ffs(1) = 0, __ffs(0x80000000) = 31.

 *

 */

static inline unsigned long __ffs(unsigned long x)

{

	asm (" bitr  .M1  %0,%0\n"

	     " nop\n"

	     " lmbd  .L1  1,%0,%0\n"

	     : "+a"(x));

	return x;

}

/*

 * ffz - find first zero in word.

 * @word: The word to search

 *

 * Undefined if no zero exists, so code should check against ~0UL first.

 */

#define ffz(x) __ffs(~(x))

/**

 * fls - find last (most-significant) bit set

 * @x: the word to search

 *

 * This is defined the same way as ffs.

 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.

 */

static inline int fls(int x)

{

	if (!x)

		return 0;

	asm (" lmbd  .L1  1,%0,%0\n" : "+a"(x));

	return 32 - x;

}

/**

 * ffs - find first bit set

 * @x: the word to search

 *

 * This is defined the same way as

 * the libc and compiler builtin ffs routines, therefore

 * differs in spirit from the above ffz (man ffs).

 * Note ffs(0) = 0, ffs(1) = 1, ffs(0x80000000) = 32.

 */

static inline int ffs(int x)

{

	if (!x)

		return 0;

	return __ffs(x) + 1;

}

#include <asm-generic/bitops/__fls.h>

#include <asm-generic/bitops/fls64.h>

#include <asm-generic/bitops/find.h>

#include <asm-generic/bitops/sched.h>

#include <asm-generic/bitops/hweight.h>

#include <asm-generic/bitops/lock.h>

#include <asm-generic/bitops/atomic.h>

#include <asm-generic/bitops/non-atomic.h>

#include <asm-generic/bitops/le.h>

#include <asm-generic/bitops/ext2-atomic.h>

#endif /* __KERNEL__ */

#endif /* _ASM_C6X_BITOPS_H */

#ifndef _ASM_C6X_BYTEORDER_H

#define _ASM_C6X_BYTEORDER_H

#include <asm/types.h>

#ifdef _BIG_ENDIAN

#include <linux/byteorder/big_endian.h>

#else /* _BIG_ENDIAN */

#include <linux/byteorder/little_endian.h>

#endif /* _BIG_ENDIAN */

#endif /* _ASM_BYTEORDER_H */

/*

 *  Port on Texas Instruments TMS320C6x architecture

 *

 *  Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated

 *  Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)

 *

 *  This program is free software; you can redistribute it and/or modify

 *  it under the terms of the GNU General Public License version 2 as

 *  published by the Free Software Foundation.

 */

#ifndef _ASM_C6X_DELAY_H

#define _ASM_C6X_DELAY_H

#include <linux/kernel.h>

extern unsigned int ticks_per_ns_scaled;

static inline void __delay(unsigned long loops)

{

	uint32_t tmp;

	/* 6 cycles per loop */

	asm volatile ("        mv    .s1  %0,%1\n"

		      "0: [%1] b     .s1  0b\n"

		      "        add   .l1  -6,%0,%0\n"

		      "        cmplt .l1  1,%0,%1\n"

		      "        nop   3\n"

		      : "+a"(loops), "=A"(tmp));

}

static inline void _c6x_tickdelay(unsigned int x)

{

	uint32_t cnt, endcnt;

	asm volatile ("        mvc   .s2   TSCL,%0\n"

		      "        add   .s2x  %0,%1,%2\n"

		      " ||     mvk   .l2   1,B0\n"

		      "0: [B0] b     .s2   0b\n"

		      "        mvc   .s2   TSCL,%0\n"

		      "        sub   .s2   %0,%2,%0\n"

		      "        cmpgt .l2   0,%0,B0\n"

		      "        nop   2\n"

		      : "=b"(cnt), "+a"(x), "=b"(endcnt) : : "B0");

}

/* use scaled math to avoid slow division */

#define C6X_NDELAY_SCALE 10

static inline void _ndelay(unsigned int n)

{

	_c6x_tickdelay((ticks_per_ns_scaled * n) >> C6X_NDELAY_SCALE);

}

static inline void _udelay(unsigned int n)

{

	while (n >= 10) {

		_ndelay(10000);

		n -= 10;

	}

	while (n-- > 0)

		_ndelay(1000);

}

#define udelay(x) _udelay((unsigned int)(x))

#define ndelay(x) _ndelay((unsigned int)(x))

#endif /* _ASM_C6X_DELAY_H */

/*

 *  Port on Texas Instruments TMS320C6x architecture

 *

 *  Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated

 *  Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)

 *

 *  This program is free software; you can redistribute it and/or modify

 *  it under the terms of the GNU General Public License version 2 as

 *  published by the Free Software Foundation.

 */

#ifndef _ASM_C6X_ELF_H

#define _ASM_C6X_ELF_H

/*

 * ELF register definitions..

 */

#include <asm/ptrace.h>

typedef unsigned long elf_greg_t;

typedef unsigned long elf_fpreg_t;

#define ELF_NGREG  58

#define ELF_NFPREG 1

typedef elf_greg_t elf_gregset_t[ELF_NGREG];

typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];

/*

 * This is used to ensure we don't load something for the wrong architecture.

 */

#define elf_check_arch(x) ((x)->e_machine == EM_TI_C6000)

#define elf_check_const_displacement(x) (1)

/*

 * These are used to set parameters in the core dumps.

 */

#ifdef __LITTLE_ENDIAN__

#define ELF_DATA	ELFDATA2LSB

#else

#define ELF_DATA	ELFDATA2MSB

#endif

#define ELF_CLASS	ELFCLASS32

#define ELF_ARCH	EM_TI_C6000

/* Nothing for now. Need to setup DP... */

#define ELF_PLAT_INIT(_r)

#define USE_ELF_CORE_DUMP

#define ELF_EXEC_PAGESIZE	4096

#define ELF_CORE_COPY_REGS(_dest, _regs)		\

	memcpy((char *) &_dest, (char *) _regs,		\

	sizeof(struct pt_regs));

/* This yields a mask that user programs can use to figure out what

   instruction set this cpu supports.  */

#define ELF_HWCAP	(0)

/* This yields a string that ld.so will use to load implementation

   specific libraries for optimization.  This is more specific in

   intent than poking at uname or /proc/cpuinfo.  */

#define ELF_PLATFORM  (NULL)

#define SET_PERSONALITY(ex) set_personality(PER_LINUX)

/* C6X specific section types */

#define SHT_C6000_UNWIND	0x70000001

#define SHT_C6000_PREEMPTMAP	0x70000002

#define SHT_C6000_ATTRIBUTES	0x70000003

/* C6X specific DT_ tags */

#define DT_C6000_DSBT_BASE	0x70000000

#define DT_C6000_DSBT_SIZE	0x70000001

#define DT_C6000_PREEMPTMAP	0x70000002

#define DT_C6000_DSBT_INDEX	0x70000003

/* C6X specific relocs */

#define R_C6000_NONE		0

#define R_C6000_ABS32		1

#define R_C6000_ABS16		2

#define R_C6000_ABS8		3

#define R_C6000_PCR_S21		4

#define R_C6000_PCR_S12		5

#define R_C6000_PCR_S10		6

#define R_C6000_PCR_S7		7

#define R_C6000_ABS_S16		8

#define R_C6000_ABS_L16		9

#define R_C6000_ABS_H16		10

#define R_C6000_SBR_U15_B	11

#define R_C6000_SBR_U15_H	12

#define R_C6000_SBR_U15_W	13

#define R_C6000_SBR_S16		14

#define R_C6000_SBR_L16_B	15

#define R_C6000_SBR_L16_H	16

#define R_C6000_SBR_L16_W	17

#define R_C6000_SBR_H16_B	18

#define R_C6000_SBR_H16_H	19

#define R_C6000_SBR_H16_W	20

#define R_C6000_SBR_GOT_U15_W	21

#define R_C6000_SBR_GOT_L16_W	22

#define R_C6000_SBR_GOT_H16_W	23

#define R_C6000_DSBT_INDEX	24

#define R_C6000_PREL31		25

#define R_C6000_COPY		26

#define R_C6000_ALIGN		253

#define R_C6000_FPHEAD		254

#define R_C6000_NOCMP		255

#endif /*_ASM_C6X_ELF_H */