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Commit a5c6e87a authored by Dinh Nguyen's avatar Dinh Nguyen Committed by Olof Johansson
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arm: dts: socfpga: Change some clocks of gate-clk type to perip-clk 



Some of the clocks that were designated gate-clk do not have a gate, so
change those clocks to be of periph-clk type.

Signed-off-by: default avatarDinh Nguyen <dinguyen@altera.com>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent 725dd7eb

arch/arm/boot/dts/socfpga.dtsi

+4 −3
Original line number Diff line number Diff line
@@ -245,14 +245,14 @@ 


					mpu_periph_clk: mpu_periph_clk {

						#clock-cells = <0>;

						compatible = "altr,socfpga-gate-clk";

						compatible = "altr,socfpga-perip-clk";

						clocks = <&mpuclk>;

						fixed-divider = <4>;

					};



					mpu_l2_ram_clk: mpu_l2_ram_clk {

						#clock-cells = <0>;

						compatible = "altr,socfpga-gate-clk";

						compatible = "altr,socfpga-perip-clk";

						clocks = <&mpuclk>;

						fixed-divider = <2>;

					};
@@ -266,8 +266,9 @@ 


					l3_main_clk: l3_main_clk {

						#clock-cells = <0>;

						compatible = "altr,socfpga-gate-clk";

						compatible = "altr,socfpga-perip-clk";

						clocks = <&mainclk>;

						fixed-divider = <1>;

					};



					l3_mp_clk: l3_mp_clk {