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Commit 9b3e7c9b authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull perf fixes from Ingo Molnar:
 "Misc fixlets from all around the place"

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf/x86/uncore: Fix IVT/SNB-EP uncore CBOX NID filter table
  perf/x86: Correctly use FEATURE_PDCM
  perf, nmi: Fix unknown NMI warning
  perf trace: Fix ioctl 'request' beautifier build problems on !(i386 || x86_64) arches
  perf trace: Add fallback definition of EFD_SEMAPHORE
  perf list: Fix checking for supported events on older kernels
  perf tools: Handle PERF_RECORD_HEADER_EVENT_TYPE properly
  perf probe: Do not add offset twice to uprobe address
  perf/x86: Fix Userspace RDPMC switch
  perf/x86/intel/p6: Add userspace RDPMC quirk for PPro
parents 0f0ca143 a9d3f94e

arch/x86/kernel/cpu/perf_event.c

+6 −2
Original line number Diff line number Diff line
@@ -1521,6 +1521,8 @@ static int __init init_hw_perf_events(void) 


	pr_cont("%s PMU driver.\n", x86_pmu.name);



	x86_pmu.attr_rdpmc = 1; /* enable userspace RDPMC usage by default */



	for (quirk = x86_pmu.quirks; quirk; quirk = quirk->next)

		quirk->func();
@@ -1534,7 +1536,6 @@ static int __init init_hw_perf_events(void) 
		__EVENT_CONSTRAINT(0, (1ULL << x86_pmu.num_counters) - 1,

				   0, x86_pmu.num_counters, 0, 0);



	x86_pmu.attr_rdpmc = 1; /* enable userspace RDPMC usage by default */

	x86_pmu_format_group.attrs = x86_pmu.format_attrs;



	if (x86_pmu.event_attrs)
@@ -1820,9 +1821,12 @@ static ssize_t set_attr_rdpmc(struct device *cdev, 
	if (ret)

		return ret;



	if (x86_pmu.attr_rdpmc_broken)

		return -ENOTSUPP;



	if (!!val != !!x86_pmu.attr_rdpmc) {

		x86_pmu.attr_rdpmc = !!val;

		smp_call_function(change_rdpmc, (void *)val, 1);

		on_each_cpu(change_rdpmc, (void *)val, 1);

	}



	return count;

arch/x86/kernel/cpu/perf_event.h

+1 −0
Original line number Diff line number Diff line
@@ -409,6 +409,7 @@ struct x86_pmu { 
	/*

	 * sysfs attrs

	 */

	int		attr_rdpmc_broken;

	int		attr_rdpmc;

	struct attribute **format_attrs;

	struct attribute **event_attrs;

arch/x86/kernel/cpu/perf_event_intel.c

+3 −8
Original line number Diff line number Diff line
@@ -1361,10 +1361,8 @@ static int intel_pmu_handle_irq(struct pt_regs *regs) 
	intel_pmu_disable_all();

	handled = intel_pmu_drain_bts_buffer();

	status = intel_pmu_get_status();

	if (!status) {

		intel_pmu_enable_all(0);

		return handled;

	}

	if (!status)

		goto done;



	loops = 0;

again:
@@ -2310,10 +2308,7 @@ __init int intel_pmu_init(void) 
	if (version > 1)

		x86_pmu.num_counters_fixed = max((int)edx.split.num_counters_fixed, 3);



	/*

	 * v2 and above have a perf capabilities MSR

	 */

	if (version > 1) {

	if (boot_cpu_has(X86_FEATURE_PDCM)) {

		u64 capabilities;



		rdmsrl(MSR_IA32_PERF_CAPABILITIES, capabilities);

arch/x86/kernel/cpu/perf_event_intel_uncore.c

+9 −1
Original line number Diff line number Diff line
@@ -501,8 +501,11 @@ static struct extra_reg snbep_uncore_cbox_extra_regs[] = { 
	SNBEP_CBO_EVENT_EXTRA_REG(SNBEP_CBO_PMON_CTL_TID_EN,

				  SNBEP_CBO_PMON_CTL_TID_EN, 0x1),

	SNBEP_CBO_EVENT_EXTRA_REG(0x0334, 0xffff, 0x4),

	SNBEP_CBO_EVENT_EXTRA_REG(0x4334, 0xffff, 0x6),

	SNBEP_CBO_EVENT_EXTRA_REG(0x0534, 0xffff, 0x4),

	SNBEP_CBO_EVENT_EXTRA_REG(0x4534, 0xffff, 0x6),

	SNBEP_CBO_EVENT_EXTRA_REG(0x0934, 0xffff, 0x4),

	SNBEP_CBO_EVENT_EXTRA_REG(0x4934, 0xffff, 0x6),

	SNBEP_CBO_EVENT_EXTRA_REG(0x4134, 0xffff, 0x6),

	SNBEP_CBO_EVENT_EXTRA_REG(0x0135, 0xffff, 0x8),

	SNBEP_CBO_EVENT_EXTRA_REG(0x0335, 0xffff, 0x8),
@@ -1178,10 +1181,15 @@ static struct extra_reg ivt_uncore_cbox_extra_regs[] = { 
	SNBEP_CBO_EVENT_EXTRA_REG(SNBEP_CBO_PMON_CTL_TID_EN,

				  SNBEP_CBO_PMON_CTL_TID_EN, 0x1),

	SNBEP_CBO_EVENT_EXTRA_REG(0x1031, 0x10ff, 0x2),

	SNBEP_CBO_EVENT_EXTRA_REG(0x1134, 0xffff, 0x4),

	SNBEP_CBO_EVENT_EXTRA_REG(0x4134, 0xffff, 0xc),

	SNBEP_CBO_EVENT_EXTRA_REG(0x5134, 0xffff, 0xc),

	SNBEP_CBO_EVENT_EXTRA_REG(0x0334, 0xffff, 0x4),

	SNBEP_CBO_EVENT_EXTRA_REG(0x4334, 0xffff, 0xc),

	SNBEP_CBO_EVENT_EXTRA_REG(0x0534, 0xffff, 0x4),

	SNBEP_CBO_EVENT_EXTRA_REG(0x4534, 0xffff, 0xc),

	SNBEP_CBO_EVENT_EXTRA_REG(0x0934, 0xffff, 0x4),

	SNBEP_CBO_EVENT_EXTRA_REG(0x4134, 0xffff, 0xc),

	SNBEP_CBO_EVENT_EXTRA_REG(0x4934, 0xffff, 0xc),

	SNBEP_CBO_EVENT_EXTRA_REG(0x0135, 0xffff, 0x10),

	SNBEP_CBO_EVENT_EXTRA_REG(0x0335, 0xffff, 0x10),

	SNBEP_CBO_EVENT_EXTRA_REG(0x2135, 0xffff, 0x10),

arch/x86/kernel/cpu/perf_event_p6.c

+33 −15
Original line number Diff line number Diff line
@@ -231,31 +231,49 @@ static __initconst const struct x86_pmu p6_pmu = { 


};



static __init void p6_pmu_rdpmc_quirk(void)

{

	if (boot_cpu_data.x86_mask < 9) {

		/*

		 * PPro erratum 26; fixed in stepping 9 and above.

		 */

		pr_warn("Userspace RDPMC support disabled due to a CPU erratum\n");

		x86_pmu.attr_rdpmc_broken = 1;

		x86_pmu.attr_rdpmc = 0;

	}

}



__init int p6_pmu_init(void)

{

	x86_pmu = p6_pmu;



	switch (boot_cpu_data.x86_model) {

	case 1:

	case 3:  /* Pentium Pro */

	case 5:

	case 6:  /* Pentium II */

	case 7:

	case 8:

	case 11: /* Pentium III */

	case 9:

	case 13:

		/* Pentium M */

	case  1: /* Pentium Pro */

		x86_add_quirk(p6_pmu_rdpmc_quirk);

		break;



	case  3: /* Pentium II - Klamath */

	case  5: /* Pentium II - Deschutes */

	case  6: /* Pentium II - Mendocino */

		break;



	case  7: /* Pentium III - Katmai */

	case  8: /* Pentium III - Coppermine */

	case 10: /* Pentium III Xeon */

	case 11: /* Pentium III - Tualatin */

		break;



	case  9: /* Pentium M - Banias */

	case 13: /* Pentium M - Dothan */

		break;



	default:

		pr_cont("unsupported p6 CPU model %d ",

			boot_cpu_data.x86_model);

		pr_cont("unsupported p6 CPU model %d ", boot_cpu_data.x86_model);

		return -ENODEV;

	}



	x86_pmu = p6_pmu;



	memcpy(hw_cache_event_ids, p6_hw_cache_event_ids,

		sizeof(hw_cache_event_ids));





	return 0;

}