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Commit 9589919f authored by Rodrigo Vivi's avatar Rodrigo Vivi Committed by Daniel Vetter
Browse files

drm/i915: Adding TV Out Missing modes. 



These 2 modes were removed by mistake during a clean up.
So, now it is time to add them back. For further info about
supported mode and standard timing table please check:
VOL_3_display_registers_updated.pdf at intellinuxgraphics.org.

Note that this regression has been introduce in

commit 55a6713b
Author: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Date:   Thu Dec 15 14:47:33 2011 -0200

    drm/i915: Removing TV Out modes.

and this commit partially reverts it by re-adding the wrongly removed
modes.

Reported-by: default avatarRobert Lowery <rglowery@exemail.com.au>
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@gmail.com>
[danvet: Pimped commit message to cite the commit that introduced this
regression.]
Cc: stable@vger.kernel.org
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent bf2125e2

drivers/gpu/drm/i915/intel_tv.c

+48 −0
Original line number Diff line number Diff line
@@ -673,6 +673,54 @@ static const struct tv_mode tv_modes[] = { 


		.filter_table = filter_table,

	},

	{

		.name       = "480p",

		.clock		= 107520,

		.refresh	= 59940,

		.oversample     = TV_OVERSAMPLE_4X,

		.component_only = 1,



		.hsync_end      = 64,               .hblank_end         = 122,

		.hblank_start   = 842,              .htotal             = 857,



		.progressive    = true,		    .trilevel_sync = false,



		.vsync_start_f1 = 12,               .vsync_start_f2     = 12,

		.vsync_len      = 12,



		.veq_ena        = false,



		.vi_end_f1      = 44,               .vi_end_f2          = 44,

		.nbr_end        = 479,



		.burst_ena      = false,



		.filter_table = filter_table,

	},

	{

		.name       = "576p",

		.clock		= 107520,

		.refresh	= 50000,

		.oversample     = TV_OVERSAMPLE_4X,

		.component_only = 1,



		.hsync_end      = 64,               .hblank_end         = 139,

		.hblank_start   = 859,              .htotal             = 863,



		.progressive    = true,		    .trilevel_sync = false,



		.vsync_start_f1 = 10,               .vsync_start_f2     = 10,

		.vsync_len      = 10,



		.veq_ena        = false,



		.vi_end_f1      = 48,               .vi_end_f2          = 48,

		.nbr_end        = 575,



		.burst_ena      = false,



		.filter_table = filter_table,

	},

	{

		.name       = "720p@60Hz",

		.clock		= 148800,