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Commit 9255ce80 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-fixes-3.13' of git://people.freedesktop.org/~agd5f/linux into drm-fixes 

 Some additional fixes for 3.13.  Regression fixes for audio and hw_i2c,
vram fix for some SI PX cards, race fix in the hwmon code, and a few other
odds and ends.

* 'drm-fixes-3.13' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon/atom: fix bus probes when hw_i2c is set (v2)
  drm/radeon: fix null pointer dereference in dce6+ audio code
  drm/radeon: fixup bad vram size on SI
  drm/radeon: fix VGT_GS_INSTANCE_CNT register
  drm/radeon: Fix a typo in Cayman and Evergreen registers
  drm/radeon/dpm: simplify state adjust logic for NI
  drm/radeon: add radeon_vm_bo_update trace point
  drm/radeon: add VMID allocation trace point
  drm/radeon/dpm: Convert to use devm_hwmon_register_with_groups
  drm/radeon: program DCE2 audio dto just like DCE3
  drm/radeon: fix typo in fetching mpll params
parents 89570eeb ffd3d336

drivers/gpu/drm/radeon/atombios_i2c.c

+9 −6
Original line number Original line Diff line number Diff line
@@ -44,7 +44,7 @@ static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan, 
	PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;

	PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;

	int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);

	int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);

	unsigned char *base;

	unsigned char *base;

	u16 out;

	u16 out = cpu_to_le16(0);





	memset(&args, 0, sizeof(args));

	memset(&args, 0, sizeof(args));
@@ -55,11 +55,14 @@ static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan, 
			DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num);

			DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num);

			return -EINVAL;

			return -EINVAL;

		}

		}

		if (buf == NULL)

			args.ucRegIndex = 0;

		else

			args.ucRegIndex = buf[0];

			args.ucRegIndex = buf[0];

		if (num > 1) {

		if (num)

			num--;

			num--;

		if (num)

			memcpy(&out, &buf[1], num);

			memcpy(&out, &buf[1], num);

		}

		args.lpI2CDataOut = cpu_to_le16(out);

		args.lpI2CDataOut = cpu_to_le16(out);

	} else {

	} else {

		if (num > ATOM_MAX_HW_I2C_READ) {

		if (num > ATOM_MAX_HW_I2C_READ) {
@@ -96,14 +99,14 @@ int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap, 
	struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);

	struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap);

	struct i2c_msg *p;

	struct i2c_msg *p;

	int i, remaining, current_count, buffer_offset, max_bytes, ret;

	int i, remaining, current_count, buffer_offset, max_bytes, ret;

	u8 buf = 0, flags;

	u8 flags;





	/* check for bus probe */

	/* check for bus probe */

	p = &msgs[0];

	p = &msgs[0];

	if ((num == 1) && (p->len == 0)) {

	if ((num == 1) && (p->len == 0)) {

		ret = radeon_process_i2c_ch(i2c,

		ret = radeon_process_i2c_ch(i2c,

					    p->addr, HW_I2C_WRITE,

					    p->addr, HW_I2C_WRITE,

					    &buf, 1);

					    NULL, 0);

		if (ret)

		if (ret)

			return ret;

			return ret;

		else

		else

drivers/gpu/drm/radeon/dce6_afmt.c

+7 −5
Original line number Original line Diff line number Diff line
@@ -93,11 +93,13 @@ void dce6_afmt_select_pin(struct drm_encoder *encoder) 
	struct radeon_device *rdev = encoder->dev->dev_private;

	struct radeon_device *rdev = encoder->dev->dev_private;

	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);

	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);

	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;

	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;

	u32 offset = dig->afmt->offset;

	u32 offset;





	if (!dig->afmt->pin)

	if (!dig || !dig->afmt || !dig->afmt->pin)

		return;

		return;





	offset = dig->afmt->offset;



	WREG32(AFMT_AUDIO_SRC_CONTROL + offset,

	WREG32(AFMT_AUDIO_SRC_CONTROL + offset,

	       AFMT_AUDIO_SRC_SELECT(dig->afmt->pin->id));

	       AFMT_AUDIO_SRC_SELECT(dig->afmt->pin->id));

}

}
@@ -112,7 +114,7 @@ void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, 
	struct radeon_connector *radeon_connector = NULL;

	struct radeon_connector *radeon_connector = NULL;

	u32 tmp = 0, offset;

	u32 tmp = 0, offset;





	if (!dig->afmt->pin)

	if (!dig || !dig->afmt || !dig->afmt->pin)

		return;

		return;





	offset = dig->afmt->pin->offset;

	offset = dig->afmt->pin->offset;
@@ -156,7 +158,7 @@ void dce6_afmt_write_speaker_allocation(struct drm_encoder *encoder) 
	u8 *sadb;

	u8 *sadb;

	int sad_count;

	int sad_count;





	if (!dig->afmt->pin)

	if (!dig || !dig->afmt || !dig->afmt->pin)

		return;

		return;





	offset = dig->afmt->pin->offset;

	offset = dig->afmt->pin->offset;
@@ -217,7 +219,7 @@ void dce6_afmt_write_sad_regs(struct drm_encoder *encoder) 
		{ AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR13, HDMI_AUDIO_CODING_TYPE_WMA_PRO },

		{ AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR13, HDMI_AUDIO_CODING_TYPE_WMA_PRO },

	};

	};





	if (!dig->afmt->pin)

	if (!dig || !dig->afmt || !dig->afmt->pin)

		return;

		return;





	offset = dig->afmt->pin->offset;

	offset = dig->afmt->pin->offset;

drivers/gpu/drm/radeon/ni_dpm.c

+11 −17
Original line number Original line Diff line number Diff line
@@ -785,8 +785,8 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev, 
	struct ni_ps *ps = ni_get_ps(rps);

	struct ni_ps *ps = ni_get_ps(rps);

	struct radeon_clock_and_voltage_limits *max_limits;

	struct radeon_clock_and_voltage_limits *max_limits;

	bool disable_mclk_switching;

	bool disable_mclk_switching;

	u32 mclk, sclk;

	u32 mclk;

	u16 vddc, vddci;

	u16 vddci;

	u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;

	u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;

	int i;

	int i;
@@ -839,24 +839,14 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev, 




	/* XXX validate the min clocks required for display */

	/* XXX validate the min clocks required for display */





	/* adjust low state */

	if (disable_mclk_switching) {

	if (disable_mclk_switching) {

		mclk  = ps->performance_levels[ps->performance_level_count - 1].mclk;

		ps->performance_levels[0].mclk =

		sclk = ps->performance_levels[0].sclk;

			ps->performance_levels[ps->performance_level_count - 1].mclk;

		vddc = ps->performance_levels[0].vddc;

		ps->performance_levels[0].vddci =

		vddci = ps->performance_levels[ps->performance_level_count - 1].vddci;

			ps->performance_levels[ps->performance_level_count - 1].vddci;

	} else {

		sclk = ps->performance_levels[0].sclk;

		mclk = ps->performance_levels[0].mclk;

		vddc = ps->performance_levels[0].vddc;

		vddci = ps->performance_levels[0].vddci;

	}

	}





	/* adjusted low state */

	ps->performance_levels[0].sclk = sclk;

	ps->performance_levels[0].mclk = mclk;

	ps->performance_levels[0].vddc = vddc;

	ps->performance_levels[0].vddci = vddci;



	btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk,

	btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk,

				  &ps->performance_levels[0].sclk,

				  &ps->performance_levels[0].sclk,

				  &ps->performance_levels[0].mclk);

				  &ps->performance_levels[0].mclk);
@@ -868,11 +858,15 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev, 
			ps->performance_levels[i].vddc = ps->performance_levels[i - 1].vddc;

			ps->performance_levels[i].vddc = ps->performance_levels[i - 1].vddc;

	}

	}





	/* adjust remaining states */

	if (disable_mclk_switching) {

	if (disable_mclk_switching) {

		mclk = ps->performance_levels[0].mclk;

		mclk = ps->performance_levels[0].mclk;

		vddci = ps->performance_levels[0].vddci;

		for (i = 1; i < ps->performance_level_count; i++) {

		for (i = 1; i < ps->performance_level_count; i++) {

			if (mclk < ps->performance_levels[i].mclk)

			if (mclk < ps->performance_levels[i].mclk)

				mclk = ps->performance_levels[i].mclk;

				mclk = ps->performance_levels[i].mclk;

			if (vddci < ps->performance_levels[i].vddci)

				vddci = ps->performance_levels[i].vddci;

		}

		}

		for (i = 0; i < ps->performance_level_count; i++) {

		for (i = 0; i < ps->performance_level_count; i++) {

			ps->performance_levels[i].mclk = mclk;

			ps->performance_levels[i].mclk = mclk;

drivers/gpu/drm/radeon/r600_hdmi.c

+2 −6
Original line number Original line Diff line number Diff line
@@ -304,9 +304,9 @@ void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock) 
			WREG32(DCCG_AUDIO_DTO1_MODULE, dto_modulo);

			WREG32(DCCG_AUDIO_DTO1_MODULE, dto_modulo);

			WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */

			WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */

		}

		}

	} else if (ASIC_IS_DCE3(rdev)) {

	} else {

		/* according to the reg specs, this should DCE3.2 only, but in

		/* according to the reg specs, this should DCE3.2 only, but in

		 * practice it seems to cover DCE3.0/3.1 as well.

		 * practice it seems to cover DCE2.0/3.0/3.1 as well.

		 */

		 */

		if (dig->dig_encoder == 0) {

		if (dig->dig_encoder == 0) {

			WREG32(DCCG_AUDIO_DTO0_PHASE, base_rate * 100);

			WREG32(DCCG_AUDIO_DTO0_PHASE, base_rate * 100);
@@ -317,10 +317,6 @@ void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock) 
			WREG32(DCCG_AUDIO_DTO1_MODULE, clock * 100);

			WREG32(DCCG_AUDIO_DTO1_MODULE, clock * 100);

			WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */

			WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */

		}

		}

	} else {

		/* according to the reg specs, this should be DCE2.0 and DCE3.0/3.1 */

		WREG32(AUDIO_DTO, AUDIO_DTO_PHASE(base_rate / 10) |

		       AUDIO_DTO_MODULE(clock / 10));

	}

	}

}

}

drivers/gpu/drm/radeon/radeon.h

+4 −4
Original line number Original line Diff line number Diff line
@@ -2710,7 +2710,7 @@ void radeon_vm_fence(struct radeon_device *rdev, 
		     struct radeon_vm *vm,

		     struct radeon_vm *vm,

		     struct radeon_fence *fence);

		     struct radeon_fence *fence);

uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr);

uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr);

int radeon_vm_bo_update_pte(struct radeon_device *rdev,

int radeon_vm_bo_update(struct radeon_device *rdev,

			struct radeon_vm *vm,

			struct radeon_vm *vm,

			struct radeon_bo *bo,

			struct radeon_bo *bo,

			struct ttm_mem_reg *mem);

			struct ttm_mem_reg *mem);