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Commit 813a95e5 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull arm soc-specific pinctrl changes from Olof Johansson:
 "With this, five platforms are moving to the relatively new pinctrl
  subsystem for their pin management, replacing the older soc specific
  in-kernel interfaces with common code.

  There is quite a bit of net addition of code for each platform being
  added to the pinctrl subsystem.  But the payback comes later when
  adding new boards can be done by only providing new device trees
  instead."

Fix up trivial conflicts in arch/arm/mach-ux500/{Makefile,board-mop500.c}

* tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (61 commits)
  mtd: nand: gpmi: fix compile error caused by pinctrl call
  ARM: PRIMA2: select PINCTRL and PINCTRL_SIRF in Kconfig
  ARM: nomadik: enable PINCTRL_NOMADIK where needed
  ARM: mxs: enable pinctrl support
  video: mxsfb: adopt pinctrl support
  ASoC: mxs-saif: adopt pinctrl support
  i2c: mxs: adopt pinctrl support
  mtd: nand: gpmi: adopt pinctrl support
  mmc: mxs-mmc: adopt pinctrl support
  serial: mxs-auart: adopt pinctrl support
  serial: amba-pl011: adopt pinctrl support
  spi/imx: adopt pinctrl support
  i2c: imx: adopt pinctrl support
  can: flexcan: adopt pinctrl support
  net: fec: adopt pinctrl support
  ARM: ux500: switch MSP to using pinctrl for pins
  ARM: ux500: alter MSP registration to return a device pointer
  ARM: ux500: switch to using pinctrl for uart0
  ARM: ux500: delete custom pin control system
  ARM: ux500: switch over to Nomadik pinctrl driver
  ...
parents 9f639269 f3f08dcb
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+108 −0
Original line number Diff line number Diff line
ST Microelectronics, SPEAr pinmux controller

Required properties:
- compatible	: "st,spear300-pinmux"
		: "st,spear310-pinmux"
		: "st,spear320-pinmux"
- reg		: Address range of the pinctrl registers
- st,pinmux-mode: Mandatory for SPEAr300 and SPEAr320 and invalid for others.
	- Its values for SPEAr300:
		- NAND_MODE		: <0>
		- NOR_MODE		: <1>
		- PHOTO_FRAME_MODE	: <2>
		- LEND_IP_PHONE_MODE	: <3>
		- HEND_IP_PHONE_MODE	: <4>
		- LEND_WIFI_PHONE_MODE	: <5>
		- HEND_WIFI_PHONE_MODE	: <6>
		- ATA_PABX_WI2S_MODE	: <7>
		- ATA_PABX_I2S_MODE	: <8>
		- CAML_LCDW_MODE	: <9>
		- CAMU_LCD_MODE		: <10>
		- CAMU_WLCD_MODE	: <11>
		- CAML_LCD_MODE		: <12>
	- Its values for SPEAr320:
		- AUTO_NET_SMII_MODE	: <0>
		- AUTO_NET_MII_MODE	: <1>
		- AUTO_EXP_MODE		: <2>
		- SMALL_PRINTERS_MODE	: <3>
		- EXTENDED_MODE		: <4>

Please refer to pinctrl-bindings.txt in this directory for details of the common
pinctrl bindings used by client devices.

SPEAr's pinmux nodes act as a container for an abitrary number of subnodes. Each
of these subnodes represents muxing for a pin, a group, or a list of pins or
groups.

The name of each subnode is not important; all subnodes should be enumerated
and processed purely based on their content.

Required subnode-properties:
- st,pins : An array of strings. Each string contains the name of a pin or
  group.
- st,function: A string containing the name of the function to mux to the pin or
  group. See the SPEAr's TRM to determine which are valid for each pin or group.

  Valid values for group and function names can be found from looking at the
  group and function arrays in driver files:
  drivers/pinctrl/spear/pinctrl-spear3*0.c

Valid values for group names are:
For All SPEAr3xx machines:
	"firda_grp", "i2c0_grp", "ssp_cs_grp", "ssp0_grp", "mii0_grp",
	"gpio0_pin0_grp", "gpio0_pin1_grp", "gpio0_pin2_grp", "gpio0_pin3_grp",
	"gpio0_pin4_grp", "gpio0_pin5_grp", "uart0_ext_grp", "uart0_grp",
	"timer_0_1_grp", timer_0_1_pins, "timer_2_3_grp"

For SPEAr300 machines:
	"fsmc_2chips_grp", "fsmc_4chips_grp", "clcd_lcdmode_grp",
	"clcd_pfmode_grp", "tdm_grp", "i2c_clk_grp_grp", "caml_grp", "camu_grp",
	"dac_grp", "i2s_grp", "sdhci_4bit_grp", "sdhci_8bit_grp",
	"gpio1_0_to_3_grp", "gpio1_4_to_7_grp"

For SPEAr310 machines:
	"emi_cs_0_to_5_grp", "uart1_grp", "uart2_grp", "uart3_grp", "uart4_grp",
	"uart5_grp", "fsmc_grp", "rs485_0_grp", "rs485_1_grp", "tdm_grp"

For SPEAr320 machines:
	"clcd_grp", "emi_grp", "fsmc_8bit_grp", "fsmc_16bit_grp", "spp_grp",
	"sdhci_led_grp", "sdhci_cd_12_grp", "sdhci_cd_51_grp", "i2s_grp",
	"uart1_grp", "uart1_modem_2_to_7_grp", "uart1_modem_31_to_36_grp",
	"uart1_modem_34_to_45_grp", "uart1_modem_80_to_85_grp", "uart2_grp",
	"uart3_8_9_grp", "uart3_15_16_grp", "uart3_41_42_grp",
	"uart3_52_53_grp", "uart3_73_74_grp", "uart3_94_95_grp",
	"uart3_98_99_grp", "uart4_6_7_grp", "uart4_13_14_grp",
	"uart4_39_40_grp", "uart4_71_72_grp", "uart4_92_93_grp",
	"uart4_100_101_grp", "uart5_4_5_grp", "uart5_37_38_grp",
	"uart5_69_70_grp", "uart5_90_91_grp", "uart6_2_3_grp",
	"uart6_88_89_grp", "rs485_grp", "touchscreen_grp", "can0_grp",
	"can1_grp", "pwm0_1_pin_8_9_grp", "pwm0_1_pin_14_15_grp",
	"pwm0_1_pin_30_31_grp", "pwm0_1_pin_37_38_grp", "pwm0_1_pin_42_43_grp",
	"pwm0_1_pin_59_60_grp", "pwm0_1_pin_88_89_grp", "pwm2_pin_7_grp",
	"pwm2_pin_13_grp", "pwm2_pin_29_grp", "pwm2_pin_34_grp",
	"pwm2_pin_41_grp", "pwm2_pin_58_grp", "pwm2_pin_87_grp",
	"pwm3_pin_6_grp", "pwm3_pin_12_grp", "pwm3_pin_28_grp",
	"pwm3_pin_40_grp", "pwm3_pin_57_grp", "pwm3_pin_86_grp",
	"ssp1_17_20_grp", "ssp1_36_39_grp", "ssp1_48_51_grp", "ssp1_65_68_grp",
	"ssp1_94_97_grp", "ssp2_13_16_grp", "ssp2_32_35_grp", "ssp2_44_47_grp",
	"ssp2_61_64_grp", "ssp2_90_93_grp", "mii2_grp", "smii0_1_grp",
	"rmii0_1_grp", "i2c1_8_9_grp", "i2c1_98_99_grp", "i2c2_0_1_grp",
	"i2c2_2_3_grp", "i2c2_19_20_grp", "i2c2_75_76_grp", "i2c2_96_97_grp"

Valid values for function names are:
For All SPEAr3xx machines:
	"firda", "i2c0", "ssp_cs", "ssp0", "mii0", "gpio0", "uart0_ext",
	"uart0", "timer_0_1", "timer_2_3"

For SPEAr300 machines:
	"fsmc", "clcd", "tdm", "i2c1", "cam", "dac", "i2s", "sdhci", "gpio1"

For SPEAr310 machines:
	"emi", "uart1", "uart2", "uart3", "uart4", "uart5", "fsmc", "rs485_0",
	"rs485_1", "tdm"

For SPEAr320 machines:
	"clcd", "emi", "fsmc", "spp", "sdhci", "i2s", "uart1", "uart1_modem",
	"uart2", "uart3", "uart4", "uart5", "uart6", "rs485", "touchscreen",
	"can0", "can1", "pwm0_1", "pwm2", "pwm3", "ssp1", "ssp2", "mii2",
	"mii0_1", "i2c1", "i2c2"
+8 −15
Original line number Diff line number Diff line
@@ -5240,6 +5240,14 @@ M: Linus Walleij <linus.walleij@linaro.org>
S:	Maintained
F:	drivers/pinctrl/

PIN CONTROLLER - ST SPEAR
M:	Viresh Kumar <viresh.kumar@st.com>
L:	spear-devel@list.st.com
L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
W:	http://www.st.com/spear
S:	Maintained
F:	driver/pinctrl/spear/

PKTCDVD DRIVER
M:	Peter Osterlund <petero2@telia.com>
S:	Maintained
@@ -6344,21 +6352,6 @@ F: arch/arm/mach-spear*/clock.c
F:	arch/arm/plat-spear/clock.c
F:	arch/arm/plat-spear/include/plat/clock.h

SPEAR PAD MULTIPLEXING SUPPORT
M:	Viresh Kumar <viresh.kumar@st.com>
L:	spear-devel@list.st.com
L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
W:	http://www.st.com/spear
S:	Maintained
F:	arch/arm/plat-spear/include/plat/padmux.h
F:	arch/arm/plat-spear/padmux.c
F:	arch/arm/mach-spear*/spear*xx.c
F:	arch/arm/mach-spear*/include/mach/generic.h
F:	arch/arm/mach-spear3xx/spear3*0.c
F:	arch/arm/mach-spear3xx/spear3*0_evb.c
F:	arch/arm/mach-spear6xx/spear600.c
F:	arch/arm/mach-spear6xx/spear600_evb.c

SPI SUBSYSTEM
M:	Grant Likely <grant.likely@secretlab.ca>
L:	spi-devel-general@lists.sourceforge.net
+4 −0
Original line number Diff line number Diff line
@@ -403,6 +403,8 @@ config ARCH_PRIMA2
	select CLKDEV_LOOKUP
	select GENERIC_IRQ_CHIP
	select MIGHT_HAVE_CACHE_L2X0
	select PINCTRL
	select PINCTRL_SIRF
	select USE_OF
	select ZONE_DMA
	help
@@ -465,6 +467,7 @@ config ARCH_MXS
	select CLKDEV_LOOKUP
	select CLKSRC_MMIO
	select HAVE_CLK_PREPARE
	select PINCTRL
	help
	  Support for Freescale MXS-based family of processors

@@ -919,6 +922,7 @@ config ARCH_NOMADIK
	select CPU_ARM926T
	select CLKDEV_LOOKUP
	select GENERIC_CLOCKEVENTS
	select PINCTRL
	select MIGHT_HAVE_CACHE_L2X0
	select ARCH_REQUIRE_GPIOLIB
	help
+38 −0
Original line number Diff line number Diff line
@@ -25,6 +25,44 @@
	};

	ahb {
		pinmux@99000000 {
			st,pinmux-mode = <2>;
			pinctrl-names = "default";
			pinctrl-0 = <&state_default>;

			state_default: pinmux {
				i2c0 {
					st,pins = "i2c0_grp";
					st,function = "i2c0";
				};
				ssp0 {
					st,pins = "ssp0_grp";
					st,function = "ssp0";
				};
				mii0 {
					st,pins = "mii0_grp";
					st,function = "mii0";
				};
				uart0 {
					st,pins = "uart0_grp";
					st,function = "uart0";
				};
				clcd {
					st,pins = "clcd_pfmode_grp";
					st,function = "clcd";
				};
				sdhci {
					st,pins = "sdhci_4bit_grp";
					st,function = "sdhci";
				};
				gpio1 {
					st,pins = "gpio1_4_to_7_grp",
						"gpio1_0_to_3_grp";
					st,function = "gpio1";
				};
			};
		};

		clcd@60000000 {
			status = "okay";
		};
+5 −0
Original line number Diff line number Diff line
@@ -21,6 +21,11 @@
		ranges = <0x60000000 0x60000000 0x50000000
			  0xd0000000 0xd0000000 0x30000000>;

		pinmux@99000000 {
			compatible = "st,spear300-pinmux";
			reg = <0x99000000 0x1000>;
		};

		clcd@60000000 {
			compatible = "arm,clcd-pl110", "arm,primecell";
			reg = <0x60000000 0x1000>;
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