Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 695d82fa authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx25-iomux-ds' of git://git.pengutronix.de/git/imx/linux-2.6 into...

Merge tag 'imx25-iomux-ds' of git://git.pengutronix.de/git/imx/linux-2.6 into next/fixes-non-critical

* tag 'imx25-iomux-ds' of git://git.pengutronix.de/git/imx/linux-2.6

:
   iomux-mx25.h slew rate adjusted for LCD __LD pins

(update to v3.3-rc6)

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 74c46469 1dde9f75
Loading
Loading
Loading
Loading
+3 −3
Original line number Diff line number Diff line
@@ -3780,7 +3780,7 @@ F: Documentation/kdump/

KERNEL AUTOMOUNTER v4 (AUTOFS4)
M:	Ian Kent <raven@themaw.net>
L:	autofs@linux.kernel.org
L:	autofs@vger.kernel.org
S:	Maintained
F:	fs/autofs4/

@@ -4685,7 +4685,7 @@ NTFS FILESYSTEM
M:	Anton Altaparmakov <anton@tuxera.com>
L:	linux-ntfs-dev@lists.sourceforge.net
W:	http://www.tuxera.com/
T:	git git://git.kernel.org/pub/scm/linux/kernel/git/aia21/ntfs-2.6.git
T:	git git://git.kernel.org/pub/scm/linux/kernel/git/aia21/ntfs.git
S:	Supported
F:	Documentation/filesystems/ntfs.txt
F:	fs/ntfs/
@@ -7271,7 +7271,7 @@ WATCHDOG DEVICE DRIVERS
M:	Wim Van Sebroeck <wim@iguana.be>
L:	linux-watchdog@vger.kernel.org
W:	http://www.linux-watchdog.org/
T:	git git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog.git
T:	git git://www.linux-watchdog.org/linux-watchdog.git
S:	Maintained
F:	Documentation/watchdog/
F:	drivers/watchdog/
+1 −1
Original line number Diff line number Diff line
VERSION = 3
PATCHLEVEL = 3
SUBLEVEL = 0
EXTRAVERSION = -rc5
EXTRAVERSION = -rc6
NAME = Saber-toothed Squirrel

# *DOCUMENTATION*
+1 −1
Original line number Diff line number Diff line
@@ -61,7 +61,7 @@
 */
#define IRQ_LPC32XX_JTAG_COMM_TX	LPC32XX_SIC1_IRQ(1)
#define IRQ_LPC32XX_JTAG_COMM_RX	LPC32XX_SIC1_IRQ(2)
#define IRQ_LPC32XX_GPI_11		LPC32XX_SIC1_IRQ(4)
#define IRQ_LPC32XX_GPI_28		LPC32XX_SIC1_IRQ(4)
#define IRQ_LPC32XX_TS_P		LPC32XX_SIC1_IRQ(6)
#define IRQ_LPC32XX_TS_IRQ		LPC32XX_SIC1_IRQ(7)
#define IRQ_LPC32XX_TS_AUX		LPC32XX_SIC1_IRQ(8)
+20 −5
Original line number Diff line number Diff line
@@ -118,6 +118,10 @@ static const struct lpc32xx_event_info lpc32xx_events[NR_IRQS] = {
		.event_group = &lpc32xx_event_pin_regs,
		.mask = LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT,
	},
	[IRQ_LPC32XX_GPI_28] = {
		.event_group = &lpc32xx_event_pin_regs,
		.mask = LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT,
	},
	[IRQ_LPC32XX_GPIO_00] = {
		.event_group = &lpc32xx_event_int_regs,
		.mask = LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT,
@@ -305,9 +309,18 @@ static int lpc32xx_irq_wake(struct irq_data *d, unsigned int state)

		if (state)
			eventreg |= lpc32xx_events[d->irq].mask;
		else
		else {
			eventreg &= ~lpc32xx_events[d->irq].mask;

			/*
			 * When disabling the wakeup, clear the latched
			 * event
			 */
			__raw_writel(lpc32xx_events[d->irq].mask,
				lpc32xx_events[d->irq].
				event_group->rawstat_reg);
		}

		__raw_writel(eventreg,
			lpc32xx_events[d->irq].event_group->enab_reg);

@@ -380,13 +393,15 @@ void __init lpc32xx_init_irq(void)

	/* Setup SIC1 */
	__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE));
	__raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
	__raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
	__raw_writel(SIC1_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
	__raw_writel(SIC1_ATR_DEFAULT,
				LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));

	/* Setup SIC2 */
	__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
	__raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
	__raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
	__raw_writel(SIC2_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
	__raw_writel(SIC2_ATR_DEFAULT,
				LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));

	/* Configure supported IRQ's */
	for (i = 0; i < NR_IRQS; i++) {
+19 −1
Original line number Diff line number Diff line
@@ -88,6 +88,7 @@ struct uartinit {
	char *uart_ck_name;
	u32 ck_mode_mask;
	void __iomem *pdiv_clk_reg;
	resource_size_t mapbase;
};

static struct uartinit uartinit_data[] __initdata = {
@@ -97,6 +98,7 @@ static struct uartinit uartinit_data[] __initdata = {
		.ck_mode_mask =
			LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 5),
		.pdiv_clk_reg = LPC32XX_CLKPWR_UART5_CLK_CTRL,
		.mapbase = LPC32XX_UART5_BASE,
	},
#endif
#ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT
@@ -105,6 +107,7 @@ static struct uartinit uartinit_data[] __initdata = {
		.ck_mode_mask =
			LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 3),
		.pdiv_clk_reg = LPC32XX_CLKPWR_UART3_CLK_CTRL,
		.mapbase = LPC32XX_UART3_BASE,
	},
#endif
#ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT
@@ -113,6 +116,7 @@ static struct uartinit uartinit_data[] __initdata = {
		.ck_mode_mask =
			LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 4),
		.pdiv_clk_reg = LPC32XX_CLKPWR_UART4_CLK_CTRL,
		.mapbase = LPC32XX_UART4_BASE,
	},
#endif
#ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT
@@ -121,6 +125,7 @@ static struct uartinit uartinit_data[] __initdata = {
		.ck_mode_mask =
			LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 6),
		.pdiv_clk_reg = LPC32XX_CLKPWR_UART6_CLK_CTRL,
		.mapbase = LPC32XX_UART6_BASE,
	},
#endif
};
@@ -165,11 +170,24 @@ void __init lpc32xx_serial_init(void)

		/* pre-UART clock divider set to 1 */
		__raw_writel(0x0101, uartinit_data[i].pdiv_clk_reg);

		/*
		 * Force a flush of the RX FIFOs to work around a
		 * HW bug
		 */
		puart = uartinit_data[i].mapbase;
		__raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
		__raw_writel(0x00, LPC32XX_UART_DLL_FIFO(puart));
		j = LPC32XX_SUART_FIFO_SIZE;
		while (j--)
			tmp = __raw_readl(
				LPC32XX_UART_DLL_FIFO(puart));
		__raw_writel(0, LPC32XX_UART_IIR_FCR(puart));
	}

	/* This needs to be done after all UART clocks are setup */
	__raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE);
	for (i = 0; i < ARRAY_SIZE(uartinit_data) - 1; i++) {
	for (i = 0; i < ARRAY_SIZE(uartinit_data); i++) {
		/* Force a flush of the RX FIFOs to work around a HW bug */
		puart = serial_std_platform_data[i].mapbase;
		__raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
Loading