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Commit 66c5c34b authored by Mohit Kumar's avatar Mohit Kumar Committed by Bjorn Helgaas
Browse files

PCI: designware: Fix comment for setting number of lanes 



Corrects comment for setting number of lanes.

Signed-off-by: default avatarMohit Kumar <mohit.kumar@st.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-by: default avatarJingoo Han <jg1.han@samsung.com>
parent c9eaa447

drivers/pci/host/pcie-designware.c

+1 −1
Original line number Diff line number Diff line
@@ -764,7 +764,7 @@ void dw_pcie_setup_rc(struct pcie_port *pp) 
	u32 membase;

	u32 memlimit;



	/* set the number of lines as 4 */

	/* set the number of lanes */

	dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL, &val);

	val &= ~PORT_LINK_MODE_MASK;

	switch (pp->lanes) {