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Commit 5ddb954b authored by Chris Wilson's avatar Chris Wilson Committed by Eric Anholt
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drm/i915/edp: Flush the write before waiting for PLLs 



Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
parent 913d8d11

drivers/gpu/drm/i915/intel_display.c

+1 −0
Original line number Diff line number Diff line
@@ -1665,6 +1665,7 @@ static void ironlake_enable_pll_edp (struct drm_crtc *crtc) 
	dpa_ctl = I915_READ(DP_A);

	dpa_ctl |= DP_PLL_ENABLE;

	I915_WRITE(DP_A, dpa_ctl);

	POSTING_READ(DP_A);

	udelay(200);

}