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Commit 545b0a74 authored by Yinghai Lu's avatar Yinghai Lu Committed by Bjorn Helgaas
Browse files

agp/intel: Support 64-bit GMADR 

Per the Intel 915G/915GV/... Chipset spec (document number 301467-005),
GMADR is a standard PCI BAR.

The PCI core reads GMADR at enumeration-time.  Use pci_bus_address()
instead of reading it again in the driver.  This works correctly for both
32-bit and 64-bit BARs.  The spec above only mentions 32-bit GMADR, but
Yinghai's patch (link below) indicates some devices have a 64-bit GMADR.

[bhelgaas: reworked starting from http://lkml.kernel.org/r/1385851238-21085-13-git-send-email-yinghai@kernel.org

]
Signed-off-by: default avatarYinghai Lu <yinghai@kernel.org>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 5acc4ce4

drivers/char/agp/intel-agp.h

+2 −2
Original line number Diff line number Diff line
@@ -55,7 +55,7 @@ 
#define INTEL_I860_ERRSTS	0xc8



/* Intel i810 registers */

#define I810_GMADDR		0x10

#define I810_GMADR_BAR		0

#define I810_MMADDR		0x14

#define I810_PTE_BASE		0x10000

#define I810_PTE_MAIN_UNCACHED	0x00000000
@@ -113,7 +113,7 @@ 
#define INTEL_I850_ERRSTS	0xc8



/* intel 915G registers */

#define I915_GMADDR	0x18

#define I915_GMADR_BAR	2

#define I915_MMADDR	0x10

#define I915_PTEADDR	0x1C

#define I915_GMCH_GMS_STOLEN_48M	(0x6 << 4)

drivers/char/agp/intel-gtt.c

+4 −8
Original line number Diff line number Diff line
@@ -608,9 +608,8 @@ static bool intel_gtt_can_wc(void) 


static int intel_gtt_init(void)

{

	u32 gma_addr;

	u32 gtt_map_size;

	int ret;

	int ret, bar;



	ret = intel_private.driver->setup();

	if (ret != 0)
@@ -660,14 +659,11 @@ static int intel_gtt_init(void) 
	}



	if (INTEL_GTT_GEN <= 2)

		pci_read_config_dword(intel_private.pcidev, I810_GMADDR,

				      &gma_addr);

		bar = I810_GMADR_BAR;

	else

		pci_read_config_dword(intel_private.pcidev, I915_GMADDR,

				      &gma_addr);



	intel_private.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);

		bar = I915_GMADR_BAR;



	intel_private.gma_bus_addr = pci_bus_address(intel_private.pcidev, bar);

	return 0;

}