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Commit 4aef77b2 authored by Linus Torvalds's avatar Linus Torvalds
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Merge branch 'x86-platform-for-linus' of...

Merge branch 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip into next

Pull x86 IOSF platform updates from Ingo Molnar:
 "IOSF (Intel OnChip System Fabric) updates:

   - generalize the IOSF interface to allow mixed mode drivers: non-IOSF
     drivers to utilize of IOSF features on IOSF platforms.

   - add 'Quark X1000' IOSF/MBI support

   - clean up BayTrail and Quark PCI ID enumeration"

* 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86, iosf: Add PCI ID macros for better readability
  x86, iosf: Add Quark X1000 PCI ID
  x86, iosf: Added Quark MBI identifiers
  x86, iosf: Make IOSF driver modular and usable by more drivers
parents e0d23cdc 04725ad5
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+2 −5
Original line number Diff line number Diff line
@@ -2377,12 +2377,9 @@ config X86_DMA_REMAP
	depends on STA2X11

config IOSF_MBI
	bool
	tristate
	default m
	depends on PCI
	---help---
	  To be selected by modules requiring access to the Intel OnChip System
	  Fabric (IOSF) Sideband MailBox Interface (MBI). For MBI platforms
	  enumerable by PCI.

source "net/Kconfig"

+55 −0
Original line number Diff line number Diff line
@@ -50,6 +50,32 @@
#define BT_MBI_PCIE_READ	0x00
#define BT_MBI_PCIE_WRITE	0x01

/* Quark available units */
#define QRK_MBI_UNIT_HBA	0x00
#define QRK_MBI_UNIT_HB	0x03
#define QRK_MBI_UNIT_RMU	0x04
#define QRK_MBI_UNIT_MM	0x05
#define QRK_MBI_UNIT_MMESRAM	0x05
#define QRK_MBI_UNIT_SOC	0x31

/* Quark read/write opcodes */
#define QRK_MBI_HBA_READ	0x10
#define QRK_MBI_HBA_WRITE	0x11
#define QRK_MBI_HB_READ	0x10
#define QRK_MBI_HB_WRITE	0x11
#define QRK_MBI_RMU_READ	0x10
#define QRK_MBI_RMU_WRITE	0x11
#define QRK_MBI_MM_READ	0x10
#define QRK_MBI_MM_WRITE	0x11
#define QRK_MBI_MMESRAM_READ	0x12
#define QRK_MBI_MMESRAM_WRITE	0x13
#define QRK_MBI_SOC_READ	0x06
#define QRK_MBI_SOC_WRITE	0x07

#if IS_ENABLED(CONFIG_IOSF_MBI)

bool iosf_mbi_available(void);

/**
 * iosf_mbi_read() - MailBox Interface read command
 * @port:	port indicating subunit being accessed
@@ -87,4 +113,33 @@ int iosf_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr);
 */
int iosf_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask);

#else /* CONFIG_IOSF_MBI is not enabled */
static inline
bool iosf_mbi_available(void)
{
	return false;
}

static inline
int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr)
{
	WARN(1, "IOSF_MBI driver not available");
	return -EPERM;
}

static inline
int iosf_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr)
{
	WARN(1, "IOSF_MBI driver not available");
	return -EPERM;
}

static inline
int iosf_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask)
{
	WARN(1, "IOSF_MBI driver not available");
	return -EPERM;
}
#endif /* CONFIG_IOSF_MBI */

#endif /* IOSF_MBI_SYMS_H */
+12 −1
Original line number Diff line number Diff line
@@ -25,6 +25,9 @@

#include <asm/iosf_mbi.h>

#define PCI_DEVICE_ID_BAYTRAIL		0x0F00
#define PCI_DEVICE_ID_QUARK_X1000	0x0958

static DEFINE_SPINLOCK(iosf_mbi_lock);

static inline u32 iosf_mbi_form_mcr(u8 op, u8 port, u8 offset)
@@ -177,6 +180,13 @@ int iosf_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask)
}
EXPORT_SYMBOL(iosf_mbi_modify);

bool iosf_mbi_available(void)
{
	/* Mbi isn't hot-pluggable. No remove routine is provided */
	return mbi_pdev;
}
EXPORT_SYMBOL(iosf_mbi_available);

static int iosf_mbi_probe(struct pci_dev *pdev,
			  const struct pci_device_id *unused)
{
@@ -193,7 +203,8 @@ static int iosf_mbi_probe(struct pci_dev *pdev,
}

static DEFINE_PCI_DEVICE_TABLE(iosf_mbi_pci_ids) = {
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0F00) },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_BAYTRAIL) },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_QUARK_X1000) },
	{ 0, },
};
MODULE_DEVICE_TABLE(pci, iosf_mbi_pci_ids);