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Commit 439a1cff authored by Marek Olšák's avatar Marek Olšák Committed by Alex Deucher
Browse files

drm/radeon: expose render backend mask to the userspace 



This will allow userspace to correctly program the PA_SC_RASTER_CONFIG
register, so it can be considered a fix.

Signed-off-by: default avatarMarek Olšák <marek.olsak@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent 9fadb352

drivers/gpu/drm/radeon/cik.c

+2 −0
Original line number Diff line number Diff line
@@ -3114,6 +3114,8 @@ static void cik_setup_rb(struct radeon_device *rdev, 
		mask <<= 1;

	}



	rdev->config.cik.backend_enable_mask = enabled_rbs;



	for (i = 0; i < se_num; i++) {

		cik_select_se_sh(rdev, i, 0xffffffff);

		data = 0;

drivers/gpu/drm/radeon/radeon.h

+2 −2
Original line number Diff line number Diff line
@@ -1940,7 +1940,7 @@ struct si_asic { 
	unsigned sc_earlyz_tile_fifo_size;



	unsigned num_tile_pipes;

	unsigned num_backends_per_se;

	unsigned backend_enable_mask;

	unsigned backend_disable_mask_per_asic;

	unsigned backend_map;

	unsigned num_texture_channel_caches;
@@ -1970,7 +1970,7 @@ struct cik_asic { 
	unsigned sc_earlyz_tile_fifo_size;



	unsigned num_tile_pipes;

	unsigned num_backends_per_se;

	unsigned backend_enable_mask;

	unsigned backend_disable_mask_per_asic;

	unsigned backend_map;

	unsigned num_texture_channel_caches;

drivers/gpu/drm/radeon/radeon_kms.c

+9 −0
Original line number Diff line number Diff line
@@ -461,6 +461,15 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) 
	case RADEON_INFO_SI_CP_DMA_COMPUTE:

		*value = 1;

		break;

	case RADEON_INFO_SI_BACKEND_ENABLED_MASK:

		if (rdev->family >= CHIP_BONAIRE) {

			*value = rdev->config.cik.backend_enable_mask;

		} else if (rdev->family >= CHIP_TAHITI) {

			*value = rdev->config.si.backend_enable_mask;

		} else {

			DRM_DEBUG_KMS("BACKEND_ENABLED_MASK is si+ only!\n");

		}

		break;

	default:

		DRM_DEBUG_KMS("Invalid request %d\n", info->request);

		return -EINVAL;

drivers/gpu/drm/radeon/si.c

+2 −0
Original line number Diff line number Diff line
@@ -2855,6 +2855,8 @@ static void si_setup_rb(struct radeon_device *rdev, 
		mask <<= 1;

	}



	rdev->config.si.backend_enable_mask = enabled_rbs;



	for (i = 0; i < se_num; i++) {

		si_select_se_sh(rdev, i, 0xffffffff);

		data = 0;

include/uapi/drm/radeon_drm.h

+2 −0
Original line number Diff line number Diff line
@@ -983,6 +983,8 @@ struct drm_radeon_cs { 
#define RADEON_INFO_SI_CP_DMA_COMPUTE	0x17

/* CIK macrotile mode array */

#define RADEON_INFO_CIK_MACROTILE_MODE_ARRAY	0x18

/* query the number of render backends */

#define RADEON_INFO_SI_BACKEND_ENABLED_MASK	0x19





struct drm_radeon_info {