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Commit 3d15b798 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull arm64 update from Catalin Marinas:

 - Since drivers/irqchip/irq-gic.c no longer has dependencies on arm32
   specifics (the 'gic' branch merged), it can be enabled on arm64.

 - Enable arm64 support for poweroff/restart (for code under
   drivers/power/reset/).

 - Fixes (dts file, exception handling, bitops)

* tag 'arm64-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64:
  arm64: Treat the bitops index argument as an 'int'
  arm64: Ignore the 'write' ESR flag on cache maintenance faults
  arm64: dts: fix #address-cells for foundation-v8
  arm64: vexpress: Add support for poweroff/restart
  arm64: Enable support for the ARM GIC interrupt controller
parents 942d33da 420c158d
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+4 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ config ARM64
	select ARCH_WANT_FRAME_POINTERS
	select ARM_AMBA
	select ARM_ARCH_TIMER
	select ARM_GIC
	select CLONE_BACKWARDS
	select COMMON_CLK
	select GENERIC_CLOCKEVENTS
@@ -31,6 +32,8 @@ config ARM64
	select OF
	select OF_EARLY_FLATTREE
	select PERF_USE_VMALLOC
	select POWER_RESET
	select POWER_SUPPLY
	select RTC_LIB
	select SPARSE_IRQ
	select SYSCTL_EXCEPTION_TRACE
@@ -105,6 +108,7 @@ config ARCH_VEXPRESS
	bool "ARMv8 software model (Versatile Express)"
	select ARCH_REQUIRE_GPIOLIB
	select COMMON_CLK_VERSATILE
	select POWER_RESET_VEXPRESS
	select VEXPRESS_CONFIG
	help
	  This enables support for the ARMv8 software model (Versatile
+1 −1
Original line number Diff line number Diff line
@@ -23,7 +23,7 @@
	};

	cpus {
		#address-cells = <1>;
		#address-cells = <2>;
		#size-cells = <0>;

		cpu@0 {
+1 −1
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ extern void show_pte(struct mm_struct *mm, unsigned long addr);
extern void __show_regs(struct pt_regs *);

void soft_restart(unsigned long);
extern void (*pm_restart)(const char *cmd);
extern void (*arm_pm_restart)(char str, const char *cmd);

#define UDBG_UNDEFINED	(1 << 0)
#define UDBG_SYSCALL	(1 << 1)
+4 −4
Original line number Diff line number Diff line
@@ -81,8 +81,8 @@ void soft_restart(unsigned long addr)
void (*pm_power_off)(void);
EXPORT_SYMBOL_GPL(pm_power_off);

void (*pm_restart)(const char *cmd);
EXPORT_SYMBOL_GPL(pm_restart);
void (*arm_pm_restart)(char str, const char *cmd);
EXPORT_SYMBOL_GPL(arm_pm_restart);

void arch_cpu_idle_prepare(void)
{
@@ -131,8 +131,8 @@ void machine_restart(char *cmd)
	local_fiq_disable();

	/* Now call the architecture specific reboot code. */
	if (pm_restart)
		pm_restart(cmd);
	if (arm_pm_restart)
		arm_pm_restart('h', cmd);

	/*
	 * Whoops - the architecture was unable to reboot.
+5 −5
Original line number Diff line number Diff line
@@ -21,13 +21,13 @@

/*
 * x0: bits 5:0  bit offset
 *     bits 63:6 word offset
 *     bits 31:6 word offset
 * x1: address
 */
	.macro	bitop, name, instr
ENTRY(	\name	)
	and	x3, x0, #63		// Get bit offset
	eor	x0, x0, x3		// Clear low bits
	and	w3, w0, #63		// Get bit offset
	eor	w0, w0, w3		// Clear low bits
	mov	x2, #1
	add	x1, x1, x0, lsr #3	// Get word offset
	lsl	x3, x2, x3		// Create mask
@@ -41,8 +41,8 @@ ENDPROC(\name )

	.macro	testop, name, instr
ENTRY(	\name	)
	and	x3, x0, #63		// Get bit offset
	eor	x0, x0, x3		// Clear low bits
	and	w3, w0, #63		// Get bit offset
	eor	w0, w0, w3		// Clear low bits
	mov	x2, #1
	add	x1, x1, x0, lsr #3	// Get word offset
	lsl	x4, x2, x3		// Create mask
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