Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 2ab91ada authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon: re-enable PTE/PDE packet for set_page on cayman/TN



PTE/PDE doesn't support a single update (count = 1).  We had
previously disabled it since it we were hitting that case which
let to hangs.  The PTE/PDE packet is much more efficient for VM
updates where it can be used.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0cd9cb76
Loading
Loading
Loading
Loading
+47 −18
Original line number Diff line number Diff line
@@ -2079,6 +2079,8 @@ void cayman_vm_set_page(struct radeon_device *rdev,
			}
		}
	} else {
		if ((flags & RADEON_VM_PAGE_SYSTEM) ||
		    (count == 1)) {
			while (count) {
				ndw = count * 2;
				if (ndw > 0xFFFFE)
@@ -2105,6 +2107,33 @@ void cayman_vm_set_page(struct radeon_device *rdev,
			}
			while (ib->length_dw & 0x7)
				ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0);
		} else {
			while (count) {
				ndw = count * 2;
				if (ndw > 0xFFFFE)
					ndw = 0xFFFFE;

				if (flags & RADEON_VM_PAGE_VALID)
					value = addr;
				else
					value = 0;
				/* for physically contiguous pages (vram) */
				ib->ptr[ib->length_dw++] = DMA_PTE_PDE_PACKET(ndw);
				ib->ptr[ib->length_dw++] = pe; /* dst addr */
				ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff;
				ib->ptr[ib->length_dw++] = r600_flags; /* mask */
				ib->ptr[ib->length_dw++] = 0;
				ib->ptr[ib->length_dw++] = value; /* value */
				ib->ptr[ib->length_dw++] = upper_32_bits(value);
				ib->ptr[ib->length_dw++] = incr; /* increment size */
				ib->ptr[ib->length_dw++] = 0;
				pe += ndw * 4;
				addr += (ndw / 2) * incr;
				count -= ndw / 2;
			}
		}
		while (ib->length_dw & 0x7)
			ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0);
	}
}

+5 −0
Original line number Diff line number Diff line
@@ -684,6 +684,11 @@
					 (((vmid) & 0xF) << 20) |	\
					 (((n) & 0xFFFFF) << 0))

#define DMA_PTE_PDE_PACKET(n)		((2 << 28) |			\
					 (1 << 26) |			\
					 (1 << 21) |			\
					 (((n) & 0xFFFFF) << 0))

/* async DMA Packet types */
#define	DMA_PACKET_WRITE				  0x2
#define	DMA_PACKET_COPY					  0x3