Commit 28c015a9 authored Mar 20, 2014 by Murali Karicheri Committed by Brian Norris Apr 30, 2014

mtd: davinci-nand: disable subpage write for keystone-nand



Sub page write doesn't work because of hw issue in controller found on
Keystone SOCs. AEMIF controller is also used on DaVinci SOCs which
don't seems to have any issue. So add "ti,keysone-nand" compatible
to nand driver in order to set NAND_NO_SUBPAGE_WRITE option.

Cc: Warner Losh <imp@bsdimp.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>

parent c9eaa447

drivers/mtd/nand/davinci_nand.c

+6 −0

Original line number	Diff line number	Diff line
		@@ -523,6 +523,7 @@ static struct nand_ecclayout hwecc4_2048 = {
		#if defined(CONFIG_OF)
		static const struct of_device_id davinci_nand_of_match[] = {
		{.compatible = "ti,davinci-nand", },
		{.compatible = "ti,keystone-nand", },
		{},
		};
		MODULE_DEVICE_TABLE(of, davinci_nand_of_match);
		@@ -581,6 +582,11 @@ static struct davinci_nand_pdata
		of_property_read_bool(pdev->dev.of_node,
		"ti,davinci-nand-use-bbt"))
		pdata->bbt_options = NAND_BBT_USE_FLASH;

		if (of_device_is_compatible(pdev->dev.of_node,
		"ti,keystone-nand")) {
		pdata->options \|= NAND_NO_SUBPAGE_WRITE;
		}
		}

		return dev_get_platdata(&pdev->dev);