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Commit 26fe681f authored by Peter De Schrijver's avatar Peter De Schrijver Committed by Olof Johansson
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ARM: tegra: functions to access the flowcontroller 



Introduce some functions to write to the flowcontroller registers. The
flowcontroller controls CPU sleepstates and wakeup.

Signed-off-by: default avatarPeter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: default avatarStephen Warren <swarren@nvidia.com>
Tested-by: default avatarStephen Warren <swarren@nvidia.com>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent cec60064

arch/arm/mach-tegra/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ obj-y += timer.o 
obj-y                                   += pinmux.o

obj-y					+= fuse.o

obj-y					+= pmc.o

obj-y					+= flowctrl.o

obj-$(CONFIG_CPU_IDLE)			+= cpuidle.o

obj-$(CONFIG_CPU_IDLE)			+= sleep.o

obj-$(CONFIG_ARCH_TEGRA_2x_SOC)		+= powergate.o

arch/arm/mach-tegra/flowctrl.c

0 → 100644
+62 −0
Original line number Diff line number Diff line 
/*

 * arch/arm/mach-tegra/flowctrl.c

 *

 * functions and macros to control the flowcontroller

 *

 * Copyright (c) 2010-2012, NVIDIA Corporation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */



#include <linux/init.h>

#include <linux/kernel.h>

#include <linux/io.h>



#include <mach/iomap.h>



#include "flowctrl.h"



u8 flowctrl_offset_halt_cpu[] = {

	FLOW_CTRL_HALT_CPU0_EVENTS,

	FLOW_CTRL_HALT_CPU1_EVENTS,

	FLOW_CTRL_HALT_CPU1_EVENTS + 8,

	FLOW_CTRL_HALT_CPU1_EVENTS + 16,

};



u8 flowctrl_offset_cpu_csr[] = {

	FLOW_CTRL_CPU0_CSR,

	FLOW_CTRL_CPU1_CSR,

	FLOW_CTRL_CPU1_CSR + 8,

	FLOW_CTRL_CPU1_CSR + 16,

};



static void flowctrl_update(u8 offset, u32 value)

{

	void __iomem *addr = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + offset;



	writel(value, addr);



	/* ensure the update has reached the flow controller */

	wmb();

	readl_relaxed(addr);

}



void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value)

{

	return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);

}



void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value)

{

	return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);

}

arch/arm/mach-tegra/flowctrl.h

+5 −0
Original line number Diff line number Diff line
@@ -34,4 +34,9 @@ 
#define FLOW_CTRL_HALT_CPU1_EVENTS	0x14

#define FLOW_CTRL_CPU1_CSR		0x18



#ifndef __ASSEMBLY__

void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value);

void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value);

#endif



#endif