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Commit 0fcb70c3 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-fixes-2014-06-26' of git://anongit.freedesktop.org/drm-intel into drm-fixes 

Fixes for 3.16-rc2; regressions, races, and warns; Broadwell PCI IDs.

* tag 'drm-intel-fixes-2014-06-26' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: vlv_prepare_pll is only needed in case of non DSI interfaces
  drm/i915: Hold the table lock whilst walking the file's idr and counting the objects in debugfs
  drm/i915: BDW: Adding Reserved PCI IDs.
  drm/i915: Only mark the ctx as initialised after a SET_CONTEXT operation
  drm/i915: default to having backlight if VBT not available
  drm/i915: cache hw power well enabled state
parents b5f4843c 8525a235

drivers/gpu/drm/i915/i915_debugfs.c

+2 −0
Original line number Diff line number Diff line
@@ -446,7 +446,9 @@ static int i915_gem_object_info(struct seq_file *m, void* data) 


		memset(&stats, 0, sizeof(stats));

		stats.file_priv = file->driver_priv;

		spin_lock(&file->table_lock);

		idr_for_each(&file->object_idr, per_file_stats, &stats);

		spin_unlock(&file->table_lock);

		/*

		 * Although we have a valid reference on file->pid, that does

		 * not guarantee that the task_struct who called get_pid() is

drivers/gpu/drm/i915/i915_drv.h

+2 −0
Original line number Diff line number Diff line
@@ -977,6 +977,8 @@ struct i915_power_well { 
	bool always_on;

	/* power well enable/disable usage count */

	int count;

	/* cached hw enabled state */

	bool hw_enabled;

	unsigned long domains;

	unsigned long data;

	const struct i915_power_well_ops *ops;

drivers/gpu/drm/i915/i915_gem_context.c

+5 −3
Original line number Diff line number Diff line
@@ -598,6 +598,7 @@ static int do_switch(struct intel_engine_cs *ring, 
	struct intel_context *from = ring->last_context;

	struct i915_hw_ppgtt *ppgtt = ctx_to_ppgtt(to);

	u32 hw_flags = 0;

	bool uninitialized = false;

	int ret, i;



	if (from != NULL && ring == &dev_priv->ring[RCS]) {
@@ -696,19 +697,20 @@ static int do_switch(struct intel_engine_cs *ring, 
		i915_gem_context_unreference(from);

	}



	uninitialized = !to->is_initialized && from == NULL;

	to->is_initialized = true;



done:

	i915_gem_context_reference(to);

	ring->last_context = to;

	to->last_ring = ring;



	if (ring->id == RCS && !to->is_initialized && from == NULL) {

	if (uninitialized) {

		ret = i915_gem_render_state_init(ring);

		if (ret)

			DRM_ERROR("init render state: %d\n", ret);

	}



	to->is_initialized = true;



	return 0;



unpin_out:

drivers/gpu/drm/i915/intel_bios.c

+3 −3
Original line number Diff line number Diff line
@@ -315,9 +315,6 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb) 
	const struct bdb_lfp_backlight_data *backlight_data;

	const struct bdb_lfp_backlight_data_entry *entry;



	/* Err to enabling backlight if no backlight block. */

	dev_priv->vbt.backlight.present = true;



	backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);

	if (!backlight_data)

		return;
@@ -1088,6 +1085,9 @@ init_vbt_defaults(struct drm_i915_private *dev_priv) 


	dev_priv->vbt.crt_ddc_pin = GMBUS_PORT_VGADDC;



	/* Default to having backlight */

	dev_priv->vbt.backlight.present = true;



	/* LFP panel data */

	dev_priv->vbt.lvds_dither = 1;

	dev_priv->vbt.lvds_vbt = 0;

drivers/gpu/drm/i915/intel_display.c

+7 −6
Original line number Diff line number Diff line
@@ -4564,6 +4564,9 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) 
	if (intel_crtc->active)

		return;



	is_dsi = intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI);



	if (!is_dsi && !IS_CHERRYVIEW(dev))

		vlv_prepare_pll(intel_crtc);



	/* Set up the display plane register */
@@ -4598,8 +4601,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) 
		if (encoder->pre_pll_enable)

			encoder->pre_pll_enable(encoder);



	is_dsi = intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI);



	if (!is_dsi) {

		if (IS_CHERRYVIEW(dev))

			chv_enable_pll(intel_crtc);
@@ -12411,7 +12412,7 @@ intel_display_capture_error_state(struct drm_device *dev) 


	for_each_pipe(i) {

		error->pipe[i].power_domain_on =

			intel_display_power_enabled_sw(dev_priv,

			intel_display_power_enabled_unlocked(dev_priv,

							   POWER_DOMAIN_PIPE(i));

		if (!error->pipe[i].power_domain_on)

			continue;
@@ -12447,7 +12448,7 @@ intel_display_capture_error_state(struct drm_device *dev) 
		enum transcoder cpu_transcoder = transcoders[i];



		error->transcoder[i].power_domain_on =

			intel_display_power_enabled_sw(dev_priv,

			intel_display_power_enabled_unlocked(dev_priv,

				POWER_DOMAIN_TRANSCODER(cpu_transcoder));

		if (!error->transcoder[i].power_domain_on)

			continue;