Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6 (eafa6cb1) · Commits · e / devices / android_kernel_samsung_smdk4412

arch/sh/boards/renesas/hs7751rvoip/setup.c

+8 −4

Original line number	Original line	Diff line number	Diff line
	@@ -15,12 +15,16 @@
	#include <asm/io.h>		#include <asm/io.h>
	#include <asm/machvec.h>		#include <asm/machvec.h>

	static void __init hs7751rvoip_init_irq(void)		static struct ipr_data hs77501rvoip_ipr_map[] = {
	{
	#if defined(CONFIG_HS7751RVOIP_CODEC)		#if defined(CONFIG_HS7751RVOIP_CODEC)
	make_ipr_irq(DMTE0_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);		{ DMTE0_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
	make_ipr_irq(DMTE1_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);		{ DMTE1_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
	#endif		#endif
			};

			static void __init hs7751rvoip_init_irq(void)
			{
			make_ipr_irq(hs77501rvoip_ipr_map, ARRAY_SIZE(hs77501rvoip_ipr_map));

	init_hs7751rvoip_IRQ();		init_hs7751rvoip_IRQ();
	}		}

arch/sh/boards/renesas/sh7710voipgw/setup.c

+46 −59

Original line number	Original line	Diff line number	Diff line
	@@ -13,6 +13,51 @@
	#include <asm/io.h>		#include <asm/io.h>
	#include <asm/irq.h>		#include <asm/irq.h>

			static struct ipr_data sh7710voipgw_ipr_map[] = {
			{ TIMER2_IRQ, TIMER2_IPR_ADDR, TIMER2_IPR_POS, TIMER2_PRIORITY },
			{ WDT_IRQ, WDT_IPR_ADDR, WDT_IPR_POS, WDT_PRIORITY },

			/* SCIF0 */
			{ SCIF0_ERI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY },
			{ SCIF0_RXI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY },
			{ SCIF0_BRI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY },
			{ SCIF0_TXI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY },

			/* DMAC-1 */
			{ DMTE0_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
			{ DMTE1_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
			{ DMTE2_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },
			{ DMTE3_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY },

			/* DMAC-2 */
			{ DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY },
			{ DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY },

			/* IPSEC */
			{ IPSEC_IRQ, IPSEC_IPR_ADDR, IPSEC_IPR_POS, IPSEC_PRIORITY },

			/* EDMAC */
			{ EDMAC0_IRQ, EDMAC0_IPR_ADDR, EDMAC0_IPR_POS, EDMAC0_PRIORITY },
			{ EDMAC1_IRQ, EDMAC1_IPR_ADDR, EDMAC1_IPR_POS, EDMAC1_PRIORITY },
			{ EDMAC2_IRQ, EDMAC2_IPR_ADDR, EDMAC2_IPR_POS, EDMAC2_PRIORITY },

			/* SIOF0 */
			{ SIOF0_ERI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
			{ SIOF0_TXI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
			{ SIOF0_RXI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
			{ SIOF0_CCI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },

			/* SIOF1 */
			{ SIOF1_ERI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS, SIOF1_PRIORITY },
			{ SIOF1_TXI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS, SIOF1_PRIORITY },
			{ SIOF1_RXI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS, SIOF1_PRIORITY },
			{ SIOF1_CCI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS, SIOF1_PRIORITY },

			/* SLIC IRQ's */
			{ IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY },
			{ IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY },
			};

	/*		/*
	* Initialize IRQ setting		* Initialize IRQ setting
	*/		*/
	@@ -37,65 +82,7 @@ static void __init sh7710voipgw_init_irq(void)
	*/		*/
	ctrl_outw(0x2aa, INTC_ICR1);		ctrl_outw(0x2aa, INTC_ICR1);

	/* Now make IPR interrupts */		make_ipr_irq(sh7710voipgw_ipr_map, ARRAY_SIZE(sh7710voipgw_ipr_map));
	make_ipr_irq(TIMER2_IRQ, TIMER2_IPR_ADDR,
	TIMER2_IPR_POS, TIMER2_PRIORITY);
	make_ipr_irq(WDT_IRQ, WDT_IPR_ADDR, WDT_IPR_POS, WDT_PRIORITY);

	/* SCIF0 */
	make_ipr_irq(SCIF0_ERI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS,
	SCIF0_PRIORITY);
	make_ipr_irq(SCIF0_RXI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS,
	SCIF0_PRIORITY);
	make_ipr_irq(SCIF0_BRI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS,
	SCIF0_PRIORITY);
	make_ipr_irq(SCIF0_TXI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS,
	SCIF0_PRIORITY);

	/* DMAC-1 */
	make_ipr_irq(DMTE0_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
	make_ipr_irq(DMTE1_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
	make_ipr_irq(DMTE2_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
	make_ipr_irq(DMTE3_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);

	/* DMAC-2 */
	make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
	make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);

	/* IPSEC */
	make_ipr_irq(IPSEC_IRQ, IPSEC_IPR_ADDR, IPSEC_IPR_POS, IPSEC_PRIORITY);

	/* EDMAC */
	make_ipr_irq(EDMAC0_IRQ, EDMAC0_IPR_ADDR, EDMAC0_IPR_POS,
	EDMAC0_PRIORITY);
	make_ipr_irq(EDMAC1_IRQ, EDMAC1_IPR_ADDR, EDMAC1_IPR_POS,
	EDMAC1_PRIORITY);
	make_ipr_irq(EDMAC2_IRQ, EDMAC2_IPR_ADDR, EDMAC2_IPR_POS,
	EDMAC2_PRIORITY);

	/* SIOF0 */
	make_ipr_irq(SIOF0_ERI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS,
	SIOF0_PRIORITY);
	make_ipr_irq(SIOF0_TXI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS,
	SIOF0_PRIORITY);
	make_ipr_irq(SIOF0_RXI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS,
	SIOF0_PRIORITY);
	make_ipr_irq(SIOF0_CCI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS,
	SIOF0_PRIORITY);

	/* SIOF1 */
	make_ipr_irq(SIOF1_ERI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS,
	SIOF1_PRIORITY);
	make_ipr_irq(SIOF1_TXI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS,
	SIOF1_PRIORITY);
	make_ipr_irq(SIOF1_RXI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS,
	SIOF1_PRIORITY);
	make_ipr_irq(SIOF1_CCI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS,
	SIOF1_PRIORITY);

	/* SLIC IRQ's */
	make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY);
	make_ipr_irq(IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY);
	}		}

	/*		/*

arch/sh/boards/se/7300/irq.c

+12 −8

Original line number	Original line	Diff line number	Diff line
	@@ -13,6 +13,17 @@
	#include <asm/io.h>		#include <asm/io.h>
	#include <asm/se7300.h>		#include <asm/se7300.h>

			static struct ipr_data se7300_ipr_map[] = {
			/* PC_IRQ[0-3] -> IRQ0 (32) */
			{ IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, 0x0f - IRQ0_IRQ },
			/* A_IRQ[0-3] -> IRQ1 (33) */
			{ IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, 0x0f - IRQ1_IRQ },
			{ SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
			{ DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
			{ DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
			{ VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
			};

	/*		/*
	* Initialize IRQ setting		* Initialize IRQ setting
	*/		*/
	@@ -23,14 +34,7 @@ init_7300se_IRQ(void)
	ctrl_outw(0xa000, INTC_ICR1); /* IRQ mode; IRQ0,1 enable. */		ctrl_outw(0xa000, INTC_ICR1); /* IRQ mode; IRQ0,1 enable. */
	ctrl_outw(0x0000, PORT_PFCR); /* use F for IRQ[3:0] and SIU. */		ctrl_outw(0x0000, PORT_PFCR); /* use F for IRQ[3:0] and SIU. */

	/* PC_IRQ[0-3] -> IRQ0 (32) */		make_ipr_irq(se7300_ipr_map, ARRAY_SIZE(se7300_ipr_map));
	make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, 0x0f - IRQ0_IRQ);
	/* A_IRQ[0-3] -> IRQ1 (33) */
	make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, 0x0f - IRQ1_IRQ);
	make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
	make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
	make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
	make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);

	ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */		ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */
	}		}

arch/sh/boards/se/73180/irq.c

+28 −19

Original line number	Original line	Diff line number	Diff line
	@@ -87,13 +87,38 @@ shmse_irq_demux(int irq)
	return irq;		return irq;
	}		}

			static struct ipr_data se73180_siof0_ipr_map[] = {
			{ SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
			};
			static struct ipr_data se73180_vpu_ipr_map[] = {
			{ VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8 },
			};
			static struct ipr_data se73180_other_ipr_map[] = {
			{ DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
			{ DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
			{ DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY },
			{ IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
			{ IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
			{ IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
			{ IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
			{ SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
			{ SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY },

			/* VIO interrupt */
			{ CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
			{ BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
			{ VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },

			{ LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY },
			};

	/*		/*
	* Initialize IRQ setting		* Initialize IRQ setting
	*/		*/
	void __init		void __init
	init_73180se_IRQ(void)		init_73180se_IRQ(void)
	{		{
	make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);		make_ipr_irq(se73180_siof0_ipr_map, ARRAY_SIZE(se73180_siof0_ipr_map));

	ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */		ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */
	ctrl_outw(0x2000, 0xb07fffec); /* mrshpc irq enable */		ctrl_outw(0x2000, 0xb07fffec); /* mrshpc irq enable */
	@@ -101,27 +126,11 @@ init_73180se_IRQ(void)
	ctrl_outw(2 << ((7 - 5) * 2), INTC_ICR1); /* low-level irq */		ctrl_outw(2 << ((7 - 5) * 2), INTC_ICR1); /* low-level irq */
	make_intreq_irq(10);		make_intreq_irq(10);

	make_ipr_irq(VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8);		make_ipr_irq(se73180_vpu_ipr_map, ARRAY_SIZE(se73180_vpu_ipr_map));

	ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */		ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */

	make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);		make_ipr_irq(se73180_other_ipr_map, ARRAY_SIZE(se73180_other_ipr_map));
	make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
	make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
	make_ipr_irq(IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
	make_ipr_irq(IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
	IIC0_PRIORITY);
	make_ipr_irq(IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
	IIC0_PRIORITY);
	make_ipr_irq(IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
	make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
	make_ipr_irq(SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY);

	/* VIO interrupt */
	make_ipr_irq(CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
	make_ipr_irq(BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
	make_ipr_irq(VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);

	make_ipr_irq(LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY);
	ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */		ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */
	}		}

arch/sh/boards/se/7343/irq.c

+49 −41

Original line number	Original line	Diff line number	Diff line
	@@ -102,6 +102,51 @@ shmse_irq_demux(int irq)
	static struct irqaction irq5 = { no_action, 0, CPU_MASK_NONE, "IRQ5-cascade",		static struct irqaction irq5 = { no_action, 0, CPU_MASK_NONE, "IRQ5-cascade",
	NULL, NULL};		NULL, NULL};

			static struct ipr_data se7343_irq5_ipr_map[] = {
			{ IRQ5_IRQ, IRQ5_IPR_ADDR+2, IRQ5_IPR_POS, IRQ5_PRIORITY },
			};
			static struct ipr_data se7343_siof0_vpu_ipr_map[] = {
			{ SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },
			{ VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8 },
			};
			static struct ipr_data se7343_other_ipr_map[] = {
			{ DMTE0_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
			{ DMTE1_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
			{ DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
			{ DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY },
			{ DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY },
			{ DMTE5_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY },

			/* I2C block */
			{ IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
			{ IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
			{ IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },
			{ IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY },

			{ IIC1_ALI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY },
			{ IIC1_TACKI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY },
			{ IIC1_WAITI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY },
			{ IIC1_DTEI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY },

			/* SIOF */
			{ SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY },

			/* SIU */
			{ SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY },

			/* VIO interrupt */
			{ CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
			{ BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },
			{ VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY },

			/MFI interrupt/

			{ MFI_IRQ, MFI_IPR_ADDR, MFI_IPR_POS, MFI_PRIORITY },

			/* LCD controller */
			{ LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY },
			};

	/*		/*
	* Initialize IRQ setting		* Initialize IRQ setting
	*/		*/
	@@ -138,54 +183,17 @@ init_7343se_IRQ(void)
	/* Setup all external interrupts to be active low */		/* Setup all external interrupts to be active low */
	ctrl_outw(0xaaaa, INTC_ICR1);		ctrl_outw(0xaaaa, INTC_ICR1);

	make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR+2, IRQ5_IPR_POS, IRQ5_PRIORITY);		make_ipr_irq(se7343_irq5_ipr_map, ARRAY_SIZE(se7343_irq5_ipr_map));

	setup_irq(IRQ5_IRQ, &irq5);		setup_irq(IRQ5_IRQ, &irq5);
	/* Set port control to use IRQ5 */		/* Set port control to use IRQ5 */
	(u16 )0xA4050108 &= ~0xc;		(u16 )0xA4050108 &= ~0xc;

	make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);		make_ipr_irq(se7343_siof0_vpu_ipr_map, ARRAY_SIZE(se7343_siof0_vpu_ipr_map));
	make_ipr_irq(VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8);

	ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */		ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */

	make_ipr_irq(DMTE0_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);		make_ipr_irq(se7343_other_ipr_map, ARRAY_SIZE(se7343_other_ipr_map));
	make_ipr_irq(DMTE1_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
	make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
	make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
	make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
	make_ipr_irq(DMTE5_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);

	/* I2C block */
	make_ipr_irq(IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
	make_ipr_irq(IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
	IIC0_PRIORITY);
	make_ipr_irq(IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
	IIC0_PRIORITY);
	make_ipr_irq(IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);

	make_ipr_irq(IIC1_ALI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY);
	make_ipr_irq(IIC1_TACKI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS,
	IIC1_PRIORITY);
	make_ipr_irq(IIC1_WAITI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS,
	IIC1_PRIORITY);
	make_ipr_irq(IIC1_DTEI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY);

	/* SIOF */
	make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);

	/* SIU */
	make_ipr_irq(SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY);

	/* VIO interrupt */
	make_ipr_irq(CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
	make_ipr_irq(BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
	make_ipr_irq(VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);

	/MFI interrupt/

	make_ipr_irq(MFI_IRQ, MFI_IPR_ADDR, MFI_IPR_POS, MFI_PRIORITY);

	/* LCD controller */
	make_ipr_irq(LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY);
	ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */		ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */
	}		}