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Commit d7bf8221 authored by Joerg Roedel's avatar Joerg Roedel Committed by Avi Kivity
Browse files

KVM: SVM: sync V_TPR with LAPIC.TPR if CR8 write intercept is disabled 



If the CR8 write intercept is disabled the V_TPR field of the VMCB needs to be
synced with the TPR field in the local apic.

Signed-off-by: default avatarJoerg Roedel <joerg.roedel@amd.com>
Signed-off-by: default avatarAvi Kivity <avi@qumranet.com>
parent ec7cf690

arch/x86/kvm/svm.c

+12 −0
Original line number Original line Diff line number Diff line
@@ -1620,6 +1620,16 @@ static void svm_prepare_guest_switch(struct kvm_vcpu *vcpu) 
{

{

}

}





static inline void sync_cr8_to_lapic(struct kvm_vcpu *vcpu)

{

	struct vcpu_svm *svm = to_svm(vcpu);



	if (!(svm->vmcb->control.intercept_cr_write & INTERCEPT_CR8_MASK)) {

		int cr8 = svm->vmcb->control.int_ctl & V_TPR_MASK;

		kvm_lapic_set_tpr(vcpu, cr8);

	}

}



static inline void sync_lapic_to_cr8(struct kvm_vcpu *vcpu)

static inline void sync_lapic_to_cr8(struct kvm_vcpu *vcpu)

{

{

	struct vcpu_svm *svm = to_svm(vcpu);

	struct vcpu_svm *svm = to_svm(vcpu);
@@ -1791,6 +1801,8 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) 




	stgi();

	stgi();





	sync_cr8_to_lapic(vcpu);



	svm->next_rip = 0;

	svm->next_rip = 0;

}

}