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Commit c611bed7 authored by Alan Cox's avatar Alan Cox Committed by Jeff Garzik
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ata_piix: ICH7 does not support correct MWDMA timings 



See Errata documentation. The recommended workaround is to use PIO4 instead
which will we automatically do by flagging this mode not available.

Signed-off-by: default avatarAlan Cox <alan.cox@linux.intel.com>
Signed-off-by: default avatarJeff Garzik <jgarzik@redhat.com>
parent ea7a5ed5

drivers/ata/ata_piix.c

+14 −3
Original line number Original line Diff line number Diff line
@@ -72,6 +72,7 @@ 
 *	ICH2    spec c #20	- IDE PRD must not cross a 64K boundary

 *	ICH2    spec c #20	- IDE PRD must not cross a 64K boundary

 *				  and must be dword aligned

 *				  and must be dword aligned

 *	ICH2    spec c #24	- UDMA mode 4,5 t85/86 should be 6ns not 3.3

 *	ICH2    spec c #24	- UDMA mode 4,5 t85/86 should be 6ns not 3.3

 *	ICH7	errata #16	- MWDMA1 timings are incorrect

 *

 *

 * Should have been BIOS fixed:

 * Should have been BIOS fixed:

 *	450NX:	errata #19	- DMA hangs on old 450NX

 *	450NX:	errata #19	- DMA hangs on old 450NX
@@ -94,7 +95,7 @@ 
#include <linux/dmi.h>

#include <linux/dmi.h>





#define DRV_NAME	"ata_piix"

#define DRV_NAME	"ata_piix"

#define DRV_VERSION	"2.12"

#define DRV_VERSION	"2.13"





enum {

enum {

	PIIX_IOCFG		= 0x54, /* IDE I/O configuration register */

	PIIX_IOCFG		= 0x54, /* IDE I/O configuration register */
@@ -136,6 +137,7 @@ enum piix_controller_ids { 
	ich_pata_33,		/* ICH up to UDMA 33 only */

	ich_pata_33,		/* ICH up to UDMA 33 only */

	ich_pata_66,		/* ICH up to 66 Mhz */

	ich_pata_66,		/* ICH up to 66 Mhz */

	ich_pata_100,		/* ICH up to UDMA 100 */

	ich_pata_100,		/* ICH up to UDMA 100 */

	ich_pata_100_nomwdma1,	/* ICH up to UDMA 100 but with no MWDMA1*/

	ich5_sata,

	ich5_sata,

	ich6_sata,

	ich6_sata,

	ich6m_sata,

	ich6m_sata,
@@ -216,8 +218,8 @@ static const struct pci_device_id piix_pci_tbl[] = { 
	/* ICH6 (and 6) (i915) UDMA 100 */

	/* ICH6 (and 6) (i915) UDMA 100 */

	{ 0x8086, 0x266F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },

	{ 0x8086, 0x266F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },

	/* ICH7/7-R (i945, i975) UDMA 100*/

	/* ICH7/7-R (i945, i975) UDMA 100*/

	{ 0x8086, 0x27DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },

	{ 0x8086, 0x27DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100_nomwdma1 },

	{ 0x8086, 0x269E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },

	{ 0x8086, 0x269E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100_nomwdma1 },

	/* ICH8 Mobile PATA Controller */

	/* ICH8 Mobile PATA Controller */

	{ 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },

	{ 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
@@ -487,6 +489,15 @@ static struct ata_port_info piix_port_info[] = { 
		.port_ops	= &ich_pata_ops,

		.port_ops	= &ich_pata_ops,

	},

	},





	[ich_pata_100_nomwdma1] =

	{

		.flags		= PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR,

		.pio_mask	= ATA_PIO4,

		.mwdma_mask	= ATA_MWDMA2_ONLY,

		.udma_mask	= ATA_UDMA5,

		.port_ops	= &ich_pata_ops,

	},



	[ich5_sata] =

	[ich5_sata] =

	{

	{

		.flags		= PIIX_SATA_FLAGS,

		.flags		= PIIX_SATA_FLAGS,