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Commit c4bfa28a authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Russell King
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[ARM] 3686/1: ARM: arm/common: convert irq handling 



Patch from Thomas Gleixner

From: Thomas Gleixner <tglx@linutronix.de>

Convert the files in arch/arm/common to use the generic
irq handling functions.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 4a2581a0

arch/arm/common/gic.c

+16 −2
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ 


static void __iomem *gic_dist_base;

static void __iomem *gic_cpu_base;

static DEFINE_SPINLOCK(irq_controller_lock);



/*

 * Routines to acknowledge, disable and enable interrupts
@@ -52,32 +53,45 @@ static void __iomem *gic_cpu_base; 
static void gic_ack_irq(unsigned int irq)

{

	u32 mask = 1 << (irq % 32);



	spin_lock(&irq_controller_lock);

	writel(mask, gic_dist_base + GIC_DIST_ENABLE_CLEAR + (irq / 32) * 4);

	writel(irq, gic_cpu_base + GIC_CPU_EOI);

	spin_unlock(&irq_controller_lock);

}



static void gic_mask_irq(unsigned int irq)

{

	u32 mask = 1 << (irq % 32);



	spin_lock(&irq_controller_lock);

	writel(mask, gic_dist_base + GIC_DIST_ENABLE_CLEAR + (irq / 32) * 4);

	spin_unlock(&irq_controller_lock);

}



static void gic_unmask_irq(unsigned int irq)

{

	u32 mask = 1 << (irq % 32);



	spin_lock(&irq_controller_lock);

	writel(mask, gic_dist_base + GIC_DIST_ENABLE_SET + (irq / 32) * 4);

	spin_unlock(&irq_controller_lock);

}



#ifdef CONFIG_SMP

static void gic_set_cpu(struct irqdesc *desc, unsigned int irq, unsigned int cpu)

static void gic_set_cpu(unsigned int irq, cpumask_t mask_val)

{

	void __iomem *reg = gic_dist_base + GIC_DIST_TARGET + (irq & ~3);

	unsigned int shift = (irq % 4) * 8;

	unsigned int cpu = first_cpu(mask_val);

	u32 val;



	spin_lock(&irq_controller_lock);

	irq_desc[irq].cpu = cpu;

	val = readl(reg) & ~(0xff << shift);

	val |= 1 << (cpu + shift);

	writel(val, reg);

	spin_unlock(&irq_controller_lock);

}

#endif
@@ -86,7 +100,7 @@ static struct irqchip gic_chip = { 
	.mask		= gic_mask_irq,

	.unmask		= gic_unmask_irq,

#ifdef CONFIG_SMP

	.set_cpu	= gic_set_cpu,

	.set_affinity	= gic_set_cpu,

#endif

};

arch/arm/common/sa1111.c

+3 −3
Original line number Diff line number Diff line
@@ -150,7 +150,7 @@ static void 
sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)

{

	unsigned int stat0, stat1, i;

	void __iomem *base = desc->data;

	void __iomem *base = get_irq_data(irq);



	stat0 = sa1111_readl(base + SA1111_INTSTATCLR0);

	stat1 = sa1111_readl(base + SA1111_INTSTATCLR1);
@@ -168,11 +168,11 @@ sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs) 


	for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1)

		if (stat0 & 1)

			do_edge_IRQ(i, irq_desc + i, regs);

			handle_edge_irq(i, irq_desc + i, regs);



	for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1)

		if (stat1 & 1)

			do_edge_IRQ(i, irq_desc + i, regs);

			handle_edge_irq(i, irq_desc + i, regs);



	/* For level-based interrupts */

	desc->chip->unmask(irq);

arch/arm/common/time-acorn.c

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 
#include <linux/timex.h>

#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/irq.h>



#include <asm/hardware.h>

#include <asm/io.h>