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Commit bb3daa4a authored by PJ Waskiewicz's avatar PJ Waskiewicz Committed by David S. Miller
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ixgbe: Allow Priority Flow Control settings to survive a device reset



When changing DCB parameters, ixgbe needs to have the MAC reset.  The way
the flow control code is setup today, PFC will be disabled on a reset.
This patch adds a new flow control type for PFC, and then has the netlink
layer take care of toggling which type of flow control to enable.

Signed-off-by: default avatarPeter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent ede5ad0e
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+21 −2
Original line number Diff line number Diff line
@@ -1657,6 +1657,7 @@ s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
	 * 2: Tx flow control is enabled (we can send pause frames but
	 *    we do not support receiving pause frames).
	 * 3: Both Rx and Tx flow control (symmetric) are enabled.
	 * 4: Priority Flow Control is enabled.
	 * other: Invalid.
	 */
	switch (hw->fc.current_mode) {
@@ -1686,6 +1687,11 @@ s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num)
		mflcn_reg |= IXGBE_MFLCN_RFCE;
		fccfg_reg |= IXGBE_FCCFG_TFCE_802_3X;
		break;
#ifdef CONFIG_DCB
	case ixgbe_fc_pfc:
		goto out;
		break;
#endif
	default:
		hw_dbg(hw, "Flow control param set incorrectly\n");
		ret_val = -IXGBE_ERR_CONFIG;
@@ -1746,6 +1752,7 @@ s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw)
	 * 2:  Tx flow control is enabled (we can send pause frames but
	 *     we do not support receiving pause frames).
	 * 3:  Both Rx and Tx flow control (symmetric) are enabled.
	 * 4:  Priority Flow Control is enabled.
	 * other: Invalid.
	 */
	switch (hw->fc.current_mode) {
@@ -1776,6 +1783,11 @@ s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw)
		/* Flow control (both Rx and Tx) is enabled by SW override. */
		reg |= (IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE);
		break;
#ifdef CONFIG_DCB
	case ixgbe_fc_pfc:
		goto out;
		break;
#endif
	default:
		hw_dbg(hw, "Flow control param set incorrectly\n");
		ret_val = -IXGBE_ERR_CONFIG;
@@ -1874,6 +1886,13 @@ s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw, s32 packetbuf_num)
	ixgbe_link_speed speed;
	bool link_up;

#ifdef CONFIG_DCB
	if (hw->fc.requested_mode == ixgbe_fc_pfc) {
		hw->fc.current_mode = hw->fc.requested_mode;
		goto out;
	}

#endif
	/* Validate the packetbuf configuration */
	if (packetbuf_num < 0 || packetbuf_num > 7) {
		hw_dbg(hw, "Invalid packet buffer number [%d], expected range "
+0 −1
Original line number Diff line number Diff line
@@ -298,7 +298,6 @@ s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *hw,
	reg = IXGBE_READ_REG(hw, IXGBE_RMCS);
	reg &= ~IXGBE_RMCS_TFCE_802_3X;
	/* correct the reporting of our flow control status */
	hw->fc.current_mode = ixgbe_fc_none;
	reg |= IXGBE_RMCS_TFCE_PRIORITY;
	IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg);

+0 −3
Original line number Diff line number Diff line
@@ -299,9 +299,6 @@ s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw,
		goto out;
	}

	/* PFC is mutually exclusive with link flow control */
	hw->fc.current_mode = ixgbe_fc_none;

	/* Configure PFC Tx thresholds per TC */
	for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
		/* Config and remember Tx */
+2 −0
Original line number Diff line number Diff line
@@ -130,6 +130,7 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
		adapter->tx_ring = NULL;
		adapter->rx_ring = NULL;

		adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
		adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
		adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
		ixgbe_init_interrupt_scheme(adapter);
@@ -138,6 +139,7 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
	} else {
		/* Turn off DCB */
		if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
			adapter->hw.fc.requested_mode = ixgbe_fc_default;
			if (netif_running(netdev))
				netdev->netdev_ops->ndo_stop(netdev);
			ixgbe_reset_interrupt_capability(adapter);
+3 −0
Original line number Diff line number Diff line
@@ -1939,6 +1939,9 @@ enum ixgbe_fc_mode {
	ixgbe_fc_rx_pause,
	ixgbe_fc_tx_pause,
	ixgbe_fc_full,
#ifdef CONFIG_DCB
	ixgbe_fc_pfc,
#endif
	ixgbe_fc_default
};