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Commit 4277ff5e authored by Ralf Baechle's avatar Ralf Baechle
Browse files

[MIPS] Fix use of ehb instruction for non-R2 configurations. 



Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent b4ab24e1

arch/mips/kernel/entry.S

+3 −3
Original line number Diff line number Diff line
@@ -87,7 +87,7 @@ FEXPORT(restore_all) # restore full frame 
	ori	v1, v0, TCSTATUS_IXMT

	mtc0	v1, CP0_TCSTATUS

	andi	v0, TCSTATUS_IXMT

	ehb

	_ehb

	mfc0	t0, CP0_TCCONTEXT

	DMT	9				# dmt t1

	jal	mips_ihb
@@ -95,7 +95,7 @@ FEXPORT(restore_all) # restore full frame 
	andi	t3, t0, 0xff00

	or	t2, t2, t3

	mtc0	t2, CP0_STATUS

	ehb

	_ehb

	andi	t1, t1, VPECONTROL_TE

	beqz	t1, 1f

	EMT
@@ -105,7 +105,7 @@ FEXPORT(restore_all) # restore full frame 
	xori	v1, v1, TCSTATUS_IXMT

	or	v1, v0, v1

	mtc0	v1, CP0_TCSTATUS

	ehb

	_ehb

	xor	t0, t0, t3

	mtc0	t0, CP0_TCCONTEXT

#endif /* CONFIG_MIPS_MT_SMTC */

arch/mips/kernel/gdb-low.S

+2 −2
Original line number Diff line number Diff line
@@ -291,7 +291,7 @@ 
		ori	t1, t2, TCSTATUS_IXMT

		mtc0	t1, CP0_TCSTATUS

		andi	t2, t2, TCSTATUS_IXMT

		ehb

		_ehb

		DMT	9				# dmt	t1

		jal	mips_ihb

		nop
@@ -310,7 +310,7 @@ 
		xori	t1, t1, TCSTATUS_IXMT

		or	t1, t1, t2

		mtc0	t1, CP0_TCSTATUS

		ehb

		_ehb

#endif /* CONFIG_MIPS_MT_SMTC */

		LONG_L	v0, GDB_FR_STATUS(sp)

		LONG_L	v1, GDB_FR_EPC(sp)

arch/mips/kernel/genex.S

+1 −1
Original line number Diff line number Diff line
@@ -214,7 +214,7 @@ NESTED(except_vec_vi_handler, 0, sp) 
	mtc0	t0, CP0_TCCONTEXT

	xor	t1, t1, t0

	mtc0	t1, CP0_STATUS

	ehb

	_ehb

#endif /* CONFIG_MIPS_MT_SMTC */

	CLI

	move	a0, sp

arch/mips/kernel/head.S

+1 −1
Original line number Diff line number Diff line
@@ -96,7 +96,7 @@ 
	/* Clear TKSU, leave IXMT */

	xori	t0, 0x00001800

	mtc0	t0, CP0_TCSTATUS

	ehb

	_ehb

	/* We need to leave the global IE bit set, but clear EXL...*/

	mfc0	t0, CP0_STATUS

	or	t0, ST0_CU0 | ST0_EXL | ST0_ERL | \set | \clr

arch/mips/kernel/r4k_switch.S

+3 −3
Original line number Diff line number Diff line
@@ -94,7 +94,7 @@ 
	ori	t1, t2, TCSTATUS_IXMT

	mtc0	t1, CP0_TCSTATUS

	andi	t2, t2, TCSTATUS_IXMT

	ehb

	_ehb

	DMT	8				# dmt	t0

	move	t1,ra

	jal	mips_ihb
@@ -109,7 +109,7 @@ 
	or	a2, t1

	mtc0	a2, CP0_STATUS

#ifdef CONFIG_MIPS_MT_SMTC

	ehb

	_ehb

	andi	t0, t0, VPECONTROL_TE

	beqz	t0, 1f

	emt
@@ -118,7 +118,7 @@ 
	xori	t1, t1, TCSTATUS_IXMT

	or	t1, t1, t2

	mtc0	t1, CP0_TCSTATUS

	ehb

	_ehb

#endif /* CONFIG_MIPS_MT_SMTC */

	move	v0, a0

	jr	ra