Commit 08aecfb9 authored Jun 20, 2006 by Yoichi Yuasa Committed by Ralf Baechle Jun 29, 2006

[MIPS] Remove set_c0_status(ST0_IM) from wrppmc's irq.c.



mips_cpu_irq_init() does clear_c0_status(ST0_IM) first, so
set_c0_status(ST0_IM) isn't necessary.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent 1500b9a0

arch/mips/gt64120/wrppmc/irq.c

+0 −3

Original line number	Diff line number	Diff line
		@@ -62,9 +62,6 @@ void gt64120_init_pic(void)

		void __init arch_init_irq(void)
		{
		/* enable all CPU interrupt bits. */
		set_c0_status(ST0_IM); /* IE bit is still 0 */

		/* IRQ 0 - 7 are for MIPS common irq_cpu controller */
		mips_cpu_irq_init(0);