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Commit fda3bec1 authored by CQ Tang's avatar CQ Tang Committed by David Woodhouse
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iommu/vt-d: Fix 64-bit accesses to 32-bit DMAR_GSTS_REG 



This is a 32-bit register. Apparently harmless on real hardware, but
causing justified warnings in simulation.

Signed-off-by: default avatarCQ Tang <cq.tang@intel.com>
Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
Cc: stable@vger.kernel.org
parent e57e58bd

drivers/iommu/dmar.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -1347,7 +1347,7 @@ void dmar_disable_qi(struct intel_iommu *iommu) 




	raw_spin_lock_irqsave(&iommu->register_lock, flags);

	raw_spin_lock_irqsave(&iommu->register_lock, flags);





	sts =  dmar_readq(iommu->reg + DMAR_GSTS_REG);

	sts =  readl(iommu->reg + DMAR_GSTS_REG);

	if (!(sts & DMA_GSTS_QIES))

	if (!(sts & DMA_GSTS_QIES))

		goto end;

		goto end;

drivers/iommu/intel_irq_remapping.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -629,7 +629,7 @@ static void iommu_disable_irq_remapping(struct intel_iommu *iommu) 




	raw_spin_lock_irqsave(&iommu->register_lock, flags);

	raw_spin_lock_irqsave(&iommu->register_lock, flags);





	sts = dmar_readq(iommu->reg + DMAR_GSTS_REG);

	sts = readl(iommu->reg + DMAR_GSTS_REG);

	if (!(sts & DMA_GSTS_IRES))

	if (!(sts & DMA_GSTS_IRES))

		goto end;

		goto end;