Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 94297784 authored by Paul Walmsley's avatar Paul Walmsley
Browse files

OMAP2xxx clock: GFX functional clock rates are not independently changeable 



According to the OMAP242x TRM Rev X Figure 5-15 "Clock Output Control
- Functional Clocks 2", the GFX functional clocks should be marked
both DELAYED_APP and CONFIG_PARTICIPANT, meaning that their rates must
be reprogrammed as part of a larger OPP set change.

Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
parent c78a05e8

arch/arm/mach-omap2/clock2xxx_data.c

+2 −1
Original line number Diff line number Diff line
@@ -737,7 +737,6 @@ static struct clk ssi_l4_ick = { 
 * divided value of fclk.

 *

 */

/* XXX REVISIT: GFX clock is part of CONFIG_PARTICIPANT, no? doublecheck. */



/* This clksel struct is shared between gfx_3d_fck and gfx_2d_fck */

static const struct clksel gfx_fck_clksel[] = {
@@ -764,6 +763,7 @@ static struct clk gfx_2d_fck = { 
	.name		= "gfx_2d_fck",

	.ops		= &clkops_omap2_dflt_wait,

	.parent		= &core_l3_ck,

	.flags		= DELAYED_APP | CONFIG_PARTICIPANT,

	.clkdm_name	= "gfx_clkdm",

	.enable_reg	= OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),

	.enable_bit	= OMAP24XX_EN_2D_SHIFT,
@@ -779,6 +779,7 @@ static struct clk gfx_ick = { 
	.name		= "gfx_ick",		/* From l3 */

	.ops		= &clkops_omap2_dflt_wait,

	.parent		= &core_l3_ck,

	.flags		= DELAYED_APP | CONFIG_PARTICIPANT,

	.clkdm_name	= "gfx_clkdm",

	.enable_reg	= OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN),

	.enable_bit	= OMAP_EN_GFX_SHIFT,