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Commit 8fa5d454 authored by Alexey Kardashevskiy's avatar Alexey Kardashevskiy Committed by Benjamin Herrenschmidt
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powerpc/powernv: Add a page size parameter to pnv_pci_setup_iommu_table() 



Since a TCE page size can be other than 4K, make it configurable for
P5IOC2 and IODA PHBs.

Signed-off-by: default avatarAlexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent bc32057e

arch/powerpc/platforms/powernv/pci-ioda.c

+3 −2
Original line number Original line Diff line number Diff line
@@ -656,7 +656,7 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb, 
	/* Setup linux iommu table */

	/* Setup linux iommu table */

	tbl = &pe->tce32_table;

	tbl = &pe->tce32_table;

	pnv_pci_setup_iommu_table(tbl, addr, TCE32_TABLE_SIZE * segs,

	pnv_pci_setup_iommu_table(tbl, addr, TCE32_TABLE_SIZE * segs,

				  base << 28);

				  base << 28, IOMMU_PAGE_SHIFT_4K);





	/* OPAL variant of P7IOC SW invalidated TCEs */

	/* OPAL variant of P7IOC SW invalidated TCEs */

	swinvp = of_get_property(phb->hose->dn, "ibm,opal-tce-kill", NULL);

	swinvp = of_get_property(phb->hose->dn, "ibm,opal-tce-kill", NULL);
@@ -786,7 +786,8 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb, 




	/* Setup linux iommu table */

	/* Setup linux iommu table */

	tbl = &pe->tce32_table;

	tbl = &pe->tce32_table;

	pnv_pci_setup_iommu_table(tbl, addr, tce_table_size, 0);

	pnv_pci_setup_iommu_table(tbl, addr, tce_table_size, 0,

			IOMMU_PAGE_SHIFT_4K);





	/* OPAL variant of PHB3 invalidated TCEs */

	/* OPAL variant of PHB3 invalidated TCEs */

	swinvp = of_get_property(phb->hose->dn, "ibm,opal-tce-kill", NULL);

	swinvp = of_get_property(phb->hose->dn, "ibm,opal-tce-kill", NULL);

arch/powerpc/platforms/powernv/pci-p5ioc2.c

+2 −1
Original line number Original line Diff line number Diff line
@@ -172,7 +172,8 @@ static void __init pnv_pci_init_p5ioc2_phb(struct device_node *np, u64 hub_id, 
	/* Setup TCEs */

	/* Setup TCEs */

	phb->dma_dev_setup = pnv_pci_p5ioc2_dma_dev_setup;

	phb->dma_dev_setup = pnv_pci_p5ioc2_dma_dev_setup;

	pnv_pci_setup_iommu_table(&phb->p5ioc2.iommu_table,

	pnv_pci_setup_iommu_table(&phb->p5ioc2.iommu_table,

				  tce_mem, tce_size, 0);

				  tce_mem, tce_size, 0,

				  IOMMU_PAGE_SHIFT_4K);

}

}





void __init pnv_pci_init_p5ioc2_hub(struct device_node *np)

void __init pnv_pci_init_p5ioc2_hub(struct device_node *np)

arch/powerpc/platforms/powernv/pci.c

+3 −3
Original line number Original line Diff line number Diff line
@@ -628,11 +628,11 @@ static void pnv_tce_free_rm(struct iommu_table *tbl, long index, long npages) 




void pnv_pci_setup_iommu_table(struct iommu_table *tbl,

void pnv_pci_setup_iommu_table(struct iommu_table *tbl,

			       void *tce_mem, u64 tce_size,

			       void *tce_mem, u64 tce_size,

			       u64 dma_offset)

			       u64 dma_offset, unsigned page_shift)

{

{

	tbl->it_blocksize = 16;

	tbl->it_blocksize = 16;

	tbl->it_base = (unsigned long)tce_mem;

	tbl->it_base = (unsigned long)tce_mem;

	tbl->it_page_shift = IOMMU_PAGE_SHIFT_4K;

	tbl->it_page_shift = page_shift;

	tbl->it_offset = dma_offset >> tbl->it_page_shift;

	tbl->it_offset = dma_offset >> tbl->it_page_shift;

	tbl->it_index = 0;

	tbl->it_index = 0;

	tbl->it_size = tce_size >> 3;

	tbl->it_size = tce_size >> 3;
@@ -657,7 +657,7 @@ static struct iommu_table *pnv_pci_setup_bml_iommu(struct pci_controller *hose) 
	if (WARN_ON(!tbl))

	if (WARN_ON(!tbl))

		return NULL;

		return NULL;

	pnv_pci_setup_iommu_table(tbl, __va(be64_to_cpup(basep)),

	pnv_pci_setup_iommu_table(tbl, __va(be64_to_cpup(basep)),

				  be32_to_cpup(sizep), 0);

				  be32_to_cpup(sizep), 0, IOMMU_PAGE_SHIFT_4K);

	iommu_init_table(tbl, hose->node);

	iommu_init_table(tbl, hose->node);

	iommu_register_group(tbl, pci_domain_nr(hose->bus), 0);

	iommu_register_group(tbl, pci_domain_nr(hose->bus), 0);

arch/powerpc/platforms/powernv/pci.h

+1 −1
Original line number Original line Diff line number Diff line
@@ -198,7 +198,7 @@ int pnv_pci_cfg_write(struct device_node *dn, 
		      int where, int size, u32 val);

		      int where, int size, u32 val);

extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl,

extern void pnv_pci_setup_iommu_table(struct iommu_table *tbl,

				      void *tce_mem, u64 tce_size,

				      void *tce_mem, u64 tce_size,

				      u64 dma_offset);

				      u64 dma_offset, unsigned page_shift);

extern void pnv_pci_init_p5ioc2_hub(struct device_node *np);

extern void pnv_pci_init_p5ioc2_hub(struct device_node *np);

extern void pnv_pci_init_ioda_hub(struct device_node *np);

extern void pnv_pci_init_ioda_hub(struct device_node *np);

extern void pnv_pci_init_ioda2_phb(struct device_node *np);

extern void pnv_pci_init_ioda2_phb(struct device_node *np);