Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8e181633 authored by Shinobu Uehara's avatar Shinobu Uehara Committed by Simon Horman
Browse files

ARM: shmobile: r8a7794: Add SDHI clocks to device tree 



Signed-off-by: default avatarShinobu Uehara <shinobu.uehara.xc@renesas.com>
[horms: omitted device nodes; only add clock]
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent c5d82c99

arch/arm/boot/dts/r8a7794.dtsi

+19 −1
Original line number Diff line number Diff line
@@ -293,6 +293,21 @@ 
			clock-output-names = "main", "pll0", "pll1", "pll3",

					     "lb", "qspi", "sdh", "sd0", "z";

		};

		/* Variable factor clocks */

		sd1_clk: sd2_clk@e6150078 {

			compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";

			reg = <0 0xe6150078 0 4>;

			clocks = <&pll1_div2_clk>;

			#clock-cells = <0>;

			clock-output-names = "sd1";

		};

		sd2_clk: sd3_clk@e615007c {

			compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";

			reg = <0 0xe615007c 0 4>;

			clocks = <&pll1_div2_clk>;

			#clock-cells = <0>;

			clock-output-names = "sd2";

		};



		/* Fixed factor clocks */

		pll1_div2_clk: pll1_div2_clk {
@@ -496,13 +511,16 @@ 
		mstp3_clks: mstp3_clks@e615013c {

			compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";

			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;

			clocks = <&rclk_clk>, <&hp_clk>, <&hp_clk>;

			clocks = <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7794_CLK_SD0>,

			         <&rclk_clk>, <&hp_clk>, <&hp_clk>;

			#clock-cells = <1>;

			clock-indices = <

			        R8A7794_CLK_SDHI2 R8A7794_CLK_SDHI1 R8A7794_CLK_SDHI0

				R8A7794_CLK_CMT1 R8A7794_CLK_USBDMAC0

				R8A7794_CLK_USBDMAC1

			>;

			clock-output-names =

			        "sdhi2", "sdhi1", "sdhi0",

				"cmt1", "usbdmac0", "usbdmac1";

		};

		mstp7_clks: mstp7_clks@e615014c {

include/dt-bindings/clock/r8a7794-clock.h

+3 −0
Original line number Diff line number Diff line
@@ -52,6 +52,9 @@ 
#define R8A7794_CLK_SYS_DMAC0		19



/* MSTP3 */

#define R8A7794_CLK_SDHI2		11

#define R8A7794_CLK_SDHI1		12

#define R8A7794_CLK_SDHI0		14

#define R8A7794_CLK_CMT1		29

#define R8A7794_CLK_USBDMAC0		30

#define R8A7794_CLK_USBDMAC1		31