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Commit 54b6a1bd authored by Huang Ying's avatar Huang Ying Committed by Herbert Xu
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crypto: aes-ni - Add support to Intel AES-NI instructions for x86_64 platform 

Intel AES-NI is a new set of Single Instruction Multiple Data (SIMD)
instructions that are going to be introduced in the next generation of
Intel processor, as of 2009. These instructions enable fast and secure
data encryption and decryption, using the Advanced Encryption Standard
(AES), defined by FIPS Publication number 197.  The architecture
introduces six instructions that offer full hardware support for
AES. Four of them support high performance data encryption and
decryption, and the other two instructions support the AES key
expansion procedure.

The white paper can be downloaded from:

http://softwarecommunity.intel.com/isn/downloads/intelavx/AES-Instructions-Set_WP.pdf



AES may be used in soft_irq context, but MMX/SSE context can not be
touched safely in soft_irq context. So in_interrupt() is checked, if
in IRQ or soft_irq context, the general x86_64 implementation are used
instead.

Signed-off-by: default avatarHuang Ying <ying.huang@intel.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 1cac2cbc

arch/x86/crypto/Makefile

+3 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ obj-$(CONFIG_CRYPTO_SALSA20_586) += salsa20-i586.o 
obj-$(CONFIG_CRYPTO_AES_X86_64) += aes-x86_64.o

obj-$(CONFIG_CRYPTO_TWOFISH_X86_64) += twofish-x86_64.o

obj-$(CONFIG_CRYPTO_SALSA20_X86_64) += salsa20-x86_64.o

obj-$(CONFIG_CRYPTO_AES_NI_INTEL) += aesni-intel.o



obj-$(CONFIG_CRYPTO_CRC32C_INTEL) += crc32c-intel.o
@@ -19,3 +20,5 @@ salsa20-i586-y := salsa20-i586-asm_32.o salsa20_glue.o 
aes-x86_64-y := aes-x86_64-asm_64.o aes_glue.o

twofish-x86_64-y := twofish-x86_64-asm_64.o twofish_glue.o

salsa20-x86_64-y := salsa20-x86_64-asm_64.o salsa20_glue.o



aesni-intel-y := aesni-intel_asm.o aesni-intel_glue.o

arch/x86/crypto/aesni-intel_asm.S

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arch/x86/crypto/aesni-intel_glue.c

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arch/x86/include/asm/cpufeature.h

+1 −0
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@@ -213,6 +213,7 @@ extern const char * const x86_power_flags[32]; 
#define cpu_has_xmm		boot_cpu_has(X86_FEATURE_XMM)

#define cpu_has_xmm2		boot_cpu_has(X86_FEATURE_XMM2)

#define cpu_has_xmm3		boot_cpu_has(X86_FEATURE_XMM3)

#define cpu_has_aes		boot_cpu_has(X86_FEATURE_AES)

#define cpu_has_ht		boot_cpu_has(X86_FEATURE_HT)

#define cpu_has_mp		boot_cpu_has(X86_FEATURE_MP)

#define cpu_has_nx		boot_cpu_has(X86_FEATURE_NX)

crypto/Kconfig

+25 −0
Original line number Diff line number Diff line
@@ -470,6 +470,31 @@ config CRYPTO_AES_X86_64 


	  See <http://csrc.nist.gov/encryption/aes/> for more information.



config CRYPTO_AES_NI_INTEL

	tristate "AES cipher algorithms (AES-NI)"

	depends on (X86 || UML_X86) && 64BIT

	select CRYPTO_AES_X86_64

	select CRYPTO_CRYPTD

	select CRYPTO_ALGAPI

	help

	  Use Intel AES-NI instructions for AES algorithm.



	  AES cipher algorithms (FIPS-197). AES uses the Rijndael

	  algorithm.



	  Rijndael appears to be consistently a very good performer in

	  both hardware and software across a wide range of computing

	  environments regardless of its use in feedback or non-feedback

	  modes. Its key setup time is excellent, and its key agility is

	  good. Rijndael's very low memory requirements make it very well

	  suited for restricted-space environments, in which it also

	  demonstrates excellent performance. Rijndael's operations are

	  among the easiest to defend against power and timing attacks.



	  The AES specifies three key sizes: 128, 192 and 256 bits



	  See <http://csrc.nist.gov/encryption/aes/> for more information.



config CRYPTO_ANUBIS

	tristate "Anubis cipher algorithm"

	select CRYPTO_ALGAPI