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Commit e036ba59 authored by Patrik Jakobsson's avatar Patrik Jakobsson Committed by Dave Airlie
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gma500: Only register interrupt handler for poulsbo hardware 



First step in adding proper irq handling. We'll start with poulsbo support so
make sure other chips don't touch drm_irq_install().

Signed-off-by: default avatarPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
Signed-off-by: default avatarAlan Cox <alan@linux.intel.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent dffc9ceb

drivers/gpu/drm/gma500/psb_drv.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -368,7 +368,7 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset) 
	PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);

	PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);

	PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);

	PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);

	spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);

	spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);

	if (drm_core_check_feature(dev, DRIVER_MODESET))

	if (IS_PSB(dev) && drm_core_check_feature(dev, DRIVER_MODESET))

		drm_irq_install(dev);

		drm_irq_install(dev);





	dev->vblank_disable_allowed = 1;

	dev->vblank_disable_allowed = 1;

drivers/gpu/drm/gma500/psb_drv.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -42,6 +42,7 @@ enum { 
	CHIP_MFLD_0130 = 3,		/* Medfield */

	CHIP_MFLD_0130 = 3,		/* Medfield */

};

};





#define IS_PSB(dev) (((dev)->pci_device & 0xfffe) == 0x8108)

#define IS_MRST(dev) (((dev)->pci_device & 0xfffc) == 0x4100)

#define IS_MRST(dev) (((dev)->pci_device & 0xfffc) == 0x4100)

#define IS_MFLD(dev) (((dev)->pci_device & 0xfff8) == 0x0130)

#define IS_MFLD(dev) (((dev)->pci_device & 0xfff8) == 0x0130)