Loading arch/arm/plat-omap/Makefile +0 −1 Original line number Diff line number Diff line Loading @@ -19,7 +19,6 @@ obj-$(CONFIG_ARCH_OMAP4) += omap_device.o obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o obj-$(CONFIG_CPU_FREQ) += cpu-omap.o obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o Loading drivers/cpufreq/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -43,6 +43,7 @@ obj-$(CONFIG_UX500_SOC_DB8500) += db8500-cpufreq.o obj-$(CONFIG_ARM_S3C64XX_CPUFREQ) += s3c64xx-cpufreq.o obj-$(CONFIG_ARM_S5PV210_CPUFREQ) += s5pv210-cpufreq.o obj-$(CONFIG_ARM_EXYNOS4210_CPUFREQ) += exynos4210-cpufreq.o obj-$(CONFIG_ARCH_OMAP2PLUS) += omap-cpufreq.o ################################################################################## # PowerPC platform drivers Loading arch/arm/plat-omap/cpu-omap.c→drivers/cpufreq/omap-cpufreq.c +274 −0 Original line number Diff line number Diff line /* * linux/arch/arm/plat-omap/cpu-omap.c * * CPU frequency scaling for OMAP * CPU frequency scaling for OMAP using OPP information * * Copyright (C) 2005 Nokia Corporation * Written by Tony Lindgren <tony@atomide.com> * * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King * * Copyright (C) 2007-2011 Texas Instruments, Inc. * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. Loading @@ -21,48 +22,49 @@ #include <linux/err.h> #include <linux/clk.h> #include <linux/io.h> #include <linux/opp.h> #include <linux/cpu.h> #include <linux/module.h> #include <mach/hardware.h> #include <plat/clock.h> #include <asm/system.h> #include <asm/smp_plat.h> #include <asm/cpu.h> #define VERY_HI_RATE 900000000 #include <plat/clock.h> #include <plat/omap-pm.h> #include <plat/common.h> #include <plat/omap_device.h> static struct cpufreq_frequency_table *freq_table; #include <mach/hardware.h> #ifdef CONFIG_SMP struct lpj_info { unsigned long ref; unsigned int freq; }; #ifdef CONFIG_ARCH_OMAP1 #define MPU_CLK "mpu" #else #define MPU_CLK "virt_prcm_set" static DEFINE_PER_CPU(struct lpj_info, lpj_ref); static struct lpj_info global_lpj_ref; #endif static struct cpufreq_frequency_table *freq_table; static atomic_t freq_table_users = ATOMIC_INIT(0); static struct clk *mpu_clk; /* TODO: Add support for SDRAM timing changes */ static char *mpu_clk_name; static struct device *mpu_dev; static int omap_verify_speed(struct cpufreq_policy *policy) { if (freq_table) return cpufreq_frequency_table_verify(policy, freq_table); if (policy->cpu) if (!freq_table) return -EINVAL; cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq); policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq); return 0; return cpufreq_frequency_table_verify(policy, freq_table); } static unsigned int omap_getspeed(unsigned int cpu) { unsigned long rate; if (cpu) if (cpu >= NR_CPUS) return 0; rate = clk_get_rate(mpu_clk) / 1000; Loading @@ -73,68 +75,151 @@ static int omap_target(struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation) { struct cpufreq_freqs freqs; unsigned int i; int ret = 0; struct cpufreq_freqs freqs; if (!freq_table) { dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__, policy->cpu); return -EINVAL; } /* Ensure desired rate is within allowed range. Some govenors * (ondemand) will just pass target_freq=0 to get the minimum. */ if (target_freq < policy->min) target_freq = policy->min; if (target_freq > policy->max) target_freq = policy->max; ret = cpufreq_frequency_table_target(policy, freq_table, target_freq, relation, &i); if (ret) { dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n", __func__, policy->cpu, target_freq, ret); return ret; } freqs.new = freq_table[i].frequency; if (!freqs.new) { dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", __func__, policy->cpu, target_freq); return -EINVAL; } freqs.old = omap_getspeed(0); freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; freqs.cpu = 0; freqs.old = omap_getspeed(policy->cpu); freqs.cpu = policy->cpu; if (freqs.old == freqs.new) if (freqs.old == freqs.new && policy->cur == freqs.new) return ret; /* notifiers */ for_each_cpu(i, policy->cpus) { freqs.cpu = i; cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); } #ifdef CONFIG_CPU_FREQ_DEBUG printk(KERN_DEBUG "cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); #endif ret = clk_set_rate(mpu_clk, freqs.new * 1000); freqs.new = omap_getspeed(policy->cpu); #ifdef CONFIG_SMP /* * Note that loops_per_jiffy is not updated on SMP systems in * cpufreq driver. So, update the per-CPU loops_per_jiffy value * on frequency transition. We need to update all dependent CPUs. */ for_each_cpu(i, policy->cpus) { struct lpj_info *lpj = &per_cpu(lpj_ref, i); if (!lpj->freq) { lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy; lpj->freq = freqs.old; } per_cpu(cpu_data, i).loops_per_jiffy = cpufreq_scale(lpj->ref, lpj->freq, freqs.new); } /* And don't forget to adjust the global one */ if (!global_lpj_ref.freq) { global_lpj_ref.ref = loops_per_jiffy; global_lpj_ref.freq = freqs.old; } loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq, freqs.new); #endif /* notifiers */ for_each_cpu(i, policy->cpus) { freqs.cpu = i; cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); } return ret; } static inline void freq_table_free(void) { if (atomic_dec_and_test(&freq_table_users)) opp_free_cpufreq_table(mpu_dev, &freq_table); } static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) { int result = 0; mpu_clk = clk_get(NULL, MPU_CLK); mpu_clk = clk_get(NULL, mpu_clk_name); if (IS_ERR(mpu_clk)) return PTR_ERR(mpu_clk); if (policy->cpu != 0) return -EINVAL; if (policy->cpu >= NR_CPUS) { result = -EINVAL; goto fail_ck; } policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); if (atomic_inc_return(&freq_table_users) == 1) result = opp_init_cpufreq_table(mpu_dev, &freq_table); policy->cur = policy->min = policy->max = omap_getspeed(0); if (result) { dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n", __func__, policy->cpu, result); goto fail_ck; } clk_init_cpufreq_table(&freq_table); if (freq_table) { result = cpufreq_frequency_table_cpuinfo(policy, freq_table); if (!result) cpufreq_frequency_table_get_attr(freq_table, policy->cpu); } else { policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, VERY_HI_RATE) / 1000; if (result) goto fail_table; cpufreq_frequency_table_get_attr(freq_table, policy->cpu); policy->min = policy->cpuinfo.min_freq; policy->max = policy->cpuinfo.max_freq; policy->cur = omap_getspeed(policy->cpu); /* * On OMAP SMP configuartion, both processors share the voltage * and clock. So both CPUs needs to be scaled together and hence * needs software co-ordination. Use cpufreq affected_cpus * interface to handle this scenario. Additional is_smp() check * is to keep SMP_ON_UP build working. */ if (is_smp()) { policy->shared_type = CPUFREQ_SHARED_TYPE_ANY; cpumask_setall(policy->cpus); } /* FIXME: what's the actual transition time? */ policy->cpuinfo.transition_latency = 300 * 1000; return 0; fail_table: freq_table_free(); fail_ck: clk_put(mpu_clk); return result; } static int omap_cpu_exit(struct cpufreq_policy *policy) { clk_exit_cpufreq_table(&freq_table); freq_table_free(); clk_put(mpu_clk); return 0; } Loading @@ -157,15 +242,33 @@ static struct cpufreq_driver omap_driver = { static int __init omap_cpufreq_init(void) { return cpufreq_register_driver(&omap_driver); if (cpu_is_omap24xx()) mpu_clk_name = "virt_prcm_set"; else if (cpu_is_omap34xx()) mpu_clk_name = "dpll1_ck"; else if (cpu_is_omap44xx()) mpu_clk_name = "dpll_mpu_ck"; if (!mpu_clk_name) { pr_err("%s: unsupported Silicon?\n", __func__); return -EINVAL; } arch_initcall(omap_cpufreq_init); mpu_dev = omap_device_get_by_hwmod_name("mpu"); if (!mpu_dev) { pr_warning("%s: unable to get the mpu device\n", __func__); return -EINVAL; } /* * if ever we want to remove this, upon cleanup call: * * cpufreq_unregister_driver() * cpufreq_frequency_table_put_attr() */ return cpufreq_register_driver(&omap_driver); } static void __exit omap_cpufreq_exit(void) { cpufreq_unregister_driver(&omap_driver); } MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs"); MODULE_LICENSE("GPL"); module_init(omap_cpufreq_init); module_exit(omap_cpufreq_exit); Loading
arch/arm/plat-omap/Makefile +0 −1 Original line number Diff line number Diff line Loading @@ -19,7 +19,6 @@ obj-$(CONFIG_ARCH_OMAP4) += omap_device.o obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o obj-$(CONFIG_CPU_FREQ) += cpu-omap.o obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o Loading
drivers/cpufreq/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -43,6 +43,7 @@ obj-$(CONFIG_UX500_SOC_DB8500) += db8500-cpufreq.o obj-$(CONFIG_ARM_S3C64XX_CPUFREQ) += s3c64xx-cpufreq.o obj-$(CONFIG_ARM_S5PV210_CPUFREQ) += s5pv210-cpufreq.o obj-$(CONFIG_ARM_EXYNOS4210_CPUFREQ) += exynos4210-cpufreq.o obj-$(CONFIG_ARCH_OMAP2PLUS) += omap-cpufreq.o ################################################################################## # PowerPC platform drivers Loading
arch/arm/plat-omap/cpu-omap.c→drivers/cpufreq/omap-cpufreq.c +274 −0 Original line number Diff line number Diff line /* * linux/arch/arm/plat-omap/cpu-omap.c * * CPU frequency scaling for OMAP * CPU frequency scaling for OMAP using OPP information * * Copyright (C) 2005 Nokia Corporation * Written by Tony Lindgren <tony@atomide.com> * * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King * * Copyright (C) 2007-2011 Texas Instruments, Inc. * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. Loading @@ -21,48 +22,49 @@ #include <linux/err.h> #include <linux/clk.h> #include <linux/io.h> #include <linux/opp.h> #include <linux/cpu.h> #include <linux/module.h> #include <mach/hardware.h> #include <plat/clock.h> #include <asm/system.h> #include <asm/smp_plat.h> #include <asm/cpu.h> #define VERY_HI_RATE 900000000 #include <plat/clock.h> #include <plat/omap-pm.h> #include <plat/common.h> #include <plat/omap_device.h> static struct cpufreq_frequency_table *freq_table; #include <mach/hardware.h> #ifdef CONFIG_SMP struct lpj_info { unsigned long ref; unsigned int freq; }; #ifdef CONFIG_ARCH_OMAP1 #define MPU_CLK "mpu" #else #define MPU_CLK "virt_prcm_set" static DEFINE_PER_CPU(struct lpj_info, lpj_ref); static struct lpj_info global_lpj_ref; #endif static struct cpufreq_frequency_table *freq_table; static atomic_t freq_table_users = ATOMIC_INIT(0); static struct clk *mpu_clk; /* TODO: Add support for SDRAM timing changes */ static char *mpu_clk_name; static struct device *mpu_dev; static int omap_verify_speed(struct cpufreq_policy *policy) { if (freq_table) return cpufreq_frequency_table_verify(policy, freq_table); if (policy->cpu) if (!freq_table) return -EINVAL; cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq); policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq); return 0; return cpufreq_frequency_table_verify(policy, freq_table); } static unsigned int omap_getspeed(unsigned int cpu) { unsigned long rate; if (cpu) if (cpu >= NR_CPUS) return 0; rate = clk_get_rate(mpu_clk) / 1000; Loading @@ -73,68 +75,151 @@ static int omap_target(struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation) { struct cpufreq_freqs freqs; unsigned int i; int ret = 0; struct cpufreq_freqs freqs; if (!freq_table) { dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__, policy->cpu); return -EINVAL; } /* Ensure desired rate is within allowed range. Some govenors * (ondemand) will just pass target_freq=0 to get the minimum. */ if (target_freq < policy->min) target_freq = policy->min; if (target_freq > policy->max) target_freq = policy->max; ret = cpufreq_frequency_table_target(policy, freq_table, target_freq, relation, &i); if (ret) { dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n", __func__, policy->cpu, target_freq, ret); return ret; } freqs.new = freq_table[i].frequency; if (!freqs.new) { dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", __func__, policy->cpu, target_freq); return -EINVAL; } freqs.old = omap_getspeed(0); freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; freqs.cpu = 0; freqs.old = omap_getspeed(policy->cpu); freqs.cpu = policy->cpu; if (freqs.old == freqs.new) if (freqs.old == freqs.new && policy->cur == freqs.new) return ret; /* notifiers */ for_each_cpu(i, policy->cpus) { freqs.cpu = i; cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); } #ifdef CONFIG_CPU_FREQ_DEBUG printk(KERN_DEBUG "cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); #endif ret = clk_set_rate(mpu_clk, freqs.new * 1000); freqs.new = omap_getspeed(policy->cpu); #ifdef CONFIG_SMP /* * Note that loops_per_jiffy is not updated on SMP systems in * cpufreq driver. So, update the per-CPU loops_per_jiffy value * on frequency transition. We need to update all dependent CPUs. */ for_each_cpu(i, policy->cpus) { struct lpj_info *lpj = &per_cpu(lpj_ref, i); if (!lpj->freq) { lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy; lpj->freq = freqs.old; } per_cpu(cpu_data, i).loops_per_jiffy = cpufreq_scale(lpj->ref, lpj->freq, freqs.new); } /* And don't forget to adjust the global one */ if (!global_lpj_ref.freq) { global_lpj_ref.ref = loops_per_jiffy; global_lpj_ref.freq = freqs.old; } loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq, freqs.new); #endif /* notifiers */ for_each_cpu(i, policy->cpus) { freqs.cpu = i; cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); } return ret; } static inline void freq_table_free(void) { if (atomic_dec_and_test(&freq_table_users)) opp_free_cpufreq_table(mpu_dev, &freq_table); } static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) { int result = 0; mpu_clk = clk_get(NULL, MPU_CLK); mpu_clk = clk_get(NULL, mpu_clk_name); if (IS_ERR(mpu_clk)) return PTR_ERR(mpu_clk); if (policy->cpu != 0) return -EINVAL; if (policy->cpu >= NR_CPUS) { result = -EINVAL; goto fail_ck; } policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); if (atomic_inc_return(&freq_table_users) == 1) result = opp_init_cpufreq_table(mpu_dev, &freq_table); policy->cur = policy->min = policy->max = omap_getspeed(0); if (result) { dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n", __func__, policy->cpu, result); goto fail_ck; } clk_init_cpufreq_table(&freq_table); if (freq_table) { result = cpufreq_frequency_table_cpuinfo(policy, freq_table); if (!result) cpufreq_frequency_table_get_attr(freq_table, policy->cpu); } else { policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, VERY_HI_RATE) / 1000; if (result) goto fail_table; cpufreq_frequency_table_get_attr(freq_table, policy->cpu); policy->min = policy->cpuinfo.min_freq; policy->max = policy->cpuinfo.max_freq; policy->cur = omap_getspeed(policy->cpu); /* * On OMAP SMP configuartion, both processors share the voltage * and clock. So both CPUs needs to be scaled together and hence * needs software co-ordination. Use cpufreq affected_cpus * interface to handle this scenario. Additional is_smp() check * is to keep SMP_ON_UP build working. */ if (is_smp()) { policy->shared_type = CPUFREQ_SHARED_TYPE_ANY; cpumask_setall(policy->cpus); } /* FIXME: what's the actual transition time? */ policy->cpuinfo.transition_latency = 300 * 1000; return 0; fail_table: freq_table_free(); fail_ck: clk_put(mpu_clk); return result; } static int omap_cpu_exit(struct cpufreq_policy *policy) { clk_exit_cpufreq_table(&freq_table); freq_table_free(); clk_put(mpu_clk); return 0; } Loading @@ -157,15 +242,33 @@ static struct cpufreq_driver omap_driver = { static int __init omap_cpufreq_init(void) { return cpufreq_register_driver(&omap_driver); if (cpu_is_omap24xx()) mpu_clk_name = "virt_prcm_set"; else if (cpu_is_omap34xx()) mpu_clk_name = "dpll1_ck"; else if (cpu_is_omap44xx()) mpu_clk_name = "dpll_mpu_ck"; if (!mpu_clk_name) { pr_err("%s: unsupported Silicon?\n", __func__); return -EINVAL; } arch_initcall(omap_cpufreq_init); mpu_dev = omap_device_get_by_hwmod_name("mpu"); if (!mpu_dev) { pr_warning("%s: unable to get the mpu device\n", __func__); return -EINVAL; } /* * if ever we want to remove this, upon cleanup call: * * cpufreq_unregister_driver() * cpufreq_frequency_table_put_attr() */ return cpufreq_register_driver(&omap_driver); } static void __exit omap_cpufreq_exit(void) { cpufreq_unregister_driver(&omap_driver); } MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs"); MODULE_LICENSE("GPL"); module_init(omap_cpufreq_init); module_exit(omap_cpufreq_exit);