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Commit 76e80576 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge branch 'at91-3.4-base+9x5' of git://github.com/at91linux/linux-at91 into at91/9x5 

* 'at91-3.4-base+9x5' of git://github.com/at91linux/linux-at91:
  ARM: at91/at91sam9x5: Device tree definition files
  ARM: at91/at91sam9x5: SoC basic support
  ARM: at91/at91sam9x5: Configuration and Makefile
  ARM: at91/at91sam9x5: clock management for at91sam9x5 chip family
  ARM: at91/at91sam9x5: PMC header file
  ARM: at91/at91sam9x5: overall definition
parents 68485231 467f1cf5

arch/arm/boot/dts/at91sam9g25ek.dts

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/*

 * at91sam9g25ek.dts - Device Tree file for AT91SAM9G25-EK board

 *

 *  Copyright (C) 2012 Atmel,

 *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>

 *

 * Licensed under GPLv2 or later.

 */

/dts-v1/;

/include/ "at91sam9x5.dtsi"

/include/ "at91sam9x5cm.dtsi"



/ {

	model = "Atmel AT91SAM9G25-EK";

	compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";



	chosen {

		bootargs = "128M console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";

	};



	ahb {

		apb {

			dbgu: serial@fffff200 {

				status = "okay";

			};



			usart0: serial@f801c000 {

				status = "okay";

			};



			macb0: ethernet@f802c000 {

				phy-mode = "rmii";

				status = "okay";

			};

		};

	};

};

arch/arm/boot/dts/at91sam9x5.dtsi

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/*

 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC

 *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,

 *                   AT91SAM9X25, AT91SAM9X35 SoC

 *

 *  Copyright (C) 2012 Atmel,

 *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>

 *

 * Licensed under GPLv2 or later.

 */



/include/ "skeleton.dtsi"



/ {

	model = "Atmel AT91SAM9x5 family SoC";

	compatible = "atmel,at91sam9x5";

	interrupt-parent = <&aic>;



	aliases {

		serial0 = &dbgu;

		serial1 = &usart0;

		serial2 = &usart1;

		serial3 = &usart2;

		gpio0 = &pioA;

		gpio1 = &pioB;

		gpio2 = &pioC;

		gpio3 = &pioD;

		tcb0 = &tcb0;

		tcb1 = &tcb1;

	};

	cpus {

		cpu@0 {

			compatible = "arm,arm926ejs";

		};

	};



	memory@20000000 {

		reg = <0x20000000 0x10000000>;

	};



	ahb {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		apb {

			compatible = "simple-bus";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges;



			aic: interrupt-controller@fffff000 {

				#interrupt-cells = <2>;

				compatible = "atmel,at91rm9200-aic";

				interrupt-controller;

				interrupt-parent;

				reg = <0xfffff000 0x200>;

			};



			pit: timer@fffffe30 {

				compatible = "atmel,at91sam9260-pit";

				reg = <0xfffffe30 0xf>;

				interrupts = <1 4>;

			};



			tcb0: timer@f8008000 {

				compatible = "atmel,at91sam9x5-tcb";

				reg = <0xf8008000 0x100>;

				interrupts = <17 4>;

			};



			tcb1: timer@f800c000 {

				compatible = "atmel,at91sam9x5-tcb";

				reg = <0xf800c000 0x100>;

				interrupts = <17 4>;

			};



			dma0: dma-controller@ffffec00 {

				compatible = "atmel,at91sam9g45-dma";

				reg = <0xffffec00 0x200>;

				interrupts = <20 4>;

			};



			dma1: dma-controller@ffffee00 {

				compatible = "atmel,at91sam9g45-dma";

				reg = <0xffffee00 0x200>;

				interrupts = <21 4>;

			};



			pioA: gpio@fffff400 {

				compatible = "atmel,at91rm9200-gpio";

				reg = <0xfffff400 0x100>;

				interrupts = <2 4>;

				#gpio-cells = <2>;

				gpio-controller;

			};



			pioB: gpio@fffff600 {

				compatible = "atmel,at91rm9200-gpio";

				reg = <0xfffff600 0x100>;

				interrupts = <2 4>;

				#gpio-cells = <2>;

				gpio-controller;

			};



			pioC: gpio@fffff800 {

				compatible = "atmel,at91rm9200-gpio";

				reg = <0xfffff800 0x100>;

				interrupts = <3 4>;

				#gpio-cells = <2>;

				gpio-controller;

			};



			pioD: gpio@fffffa00 {

				compatible = "atmel,at91rm9200-gpio";

				reg = <0xfffffa00 0x100>;

				interrupts = <3 4>;

				#gpio-cells = <2>;

				gpio-controller;

			};



			dbgu: serial@fffff200 {

				compatible = "atmel,at91sam9260-usart";

				reg = <0xfffff200 0x200>;

				interrupts = <1 4>;

				status = "disabled";

			};



			usart0: serial@f801c000 {

				compatible = "atmel,at91sam9260-usart";

				reg = <0xf801c000 0x200>;

				interrupts = <5 4>;

				atmel,use-dma-rx;

				atmel,use-dma-tx;

				status = "disabled";

			};



			usart1: serial@f8020000 {

				compatible = "atmel,at91sam9260-usart";

				reg = <0xf8020000 0x200>;

				interrupts = <6 4>;

				atmel,use-dma-rx;

				atmel,use-dma-tx;

				status = "disabled";

			};



			usart2: serial@f8024000 {

				compatible = "atmel,at91sam9260-usart";

				reg = <0xf8024000 0x200>;

				interrupts = <7 4>;

				atmel,use-dma-rx;

				atmel,use-dma-tx;

				status = "disabled";

			};



			macb0: ethernet@f802c000 {

				compatible = "cdns,at32ap7000-macb", "cdns,macb";

				reg = <0xf802c000 0x100>;

				interrupts = <24 4>;

				status = "disabled";

			};



			macb1: ethernet@f8030000 {

				compatible = "cdns,at32ap7000-macb", "cdns,macb";

				reg = <0xf8030000 0x100>;

				interrupts = <27 4>;

				status = "disabled";

			};

		};

	};

};

arch/arm/boot/dts/at91sam9x5cm.dtsi

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/*

 * at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module

 *

 *  Copyright (C) 2012 Atmel,

 *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>

 *

 * Licensed under GPLv2 or later.

 */



/ {

	memory@20000000 {

		reg = <0x20000000 0x8000000>;

	};

};

arch/arm/mach-at91/Kconfig

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@@ -102,6 +102,15 @@ config ARCH_AT91SAM9G45 
	select HAVE_AT91_DBGU1

	select AT91_SAM9G45_RESET



config ARCH_AT91SAM9X5

	bool "AT91SAM9x5 family"

	select CPU_ARM926T

	select GENERIC_CLOCKEVENTS

	select HAVE_FB_ATMEL

	select HAVE_NET_MACB

	select HAVE_AT91_DBGU0

	select AT91_SAM9G45_RESET



config ARCH_AT91X40

	bool "AT91x40"

	select ARCH_USES_GETTIMEOFFSET

arch/arm/mach-at91/Makefile

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@@ -20,6 +20,7 @@ obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_d 
obj-$(CONFIG_ARCH_AT91SAM9RL)	+= at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o

obj-$(CONFIG_ARCH_AT91SAM9G20)	+= at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o

obj-$(CONFIG_ARCH_AT91SAM9G45)	+= at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o

obj-$(CONFIG_ARCH_AT91SAM9X5)	+= at91sam9x5.o at91sam926x_time.o

obj-$(CONFIG_ARCH_AT91X40)	+= at91x40.o at91x40_time.o



# AT91RM9200 board-specific support