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Commit ffb5fd53 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel into drm-next 

More important fixes for 3.9:
- error_state improvements to help debug the new scanline wait code added
  for gen6+ - bug reports started popping up :( patch from Chris Wilson.
- fix a panel power sequence confusion between the eDP and lvds detection
  code resulting in black screens - regression introduce in 3.8 (Jani
  Nikula)
- Chris fixed the root-cause of the ilk relocation vs. evict bug.
- Another piece of cargo-culted rc6 lore from Jani, fixes up a regression
  where a system refused to go into rc6 after suspend sometimes.

* 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel:
  drm/i915: fix FORCEWAKE posting reads
  drm/i915: Invalidate the relocation presumed_offsets along the slow path
  drm/i915/eDP: do not write power sequence registers for ghost eDP
  drm/i915: Record DERRMR, FORCEWAKE and RING_CTL in error-state
parents a3f5aed4 b5144075

drivers/gpu/drm/i915/i915_debugfs.c

+3 −0
Original line number Diff line number Diff line
@@ -641,6 +641,7 @@ static void i915_ring_error_state(struct seq_file *m, 
	seq_printf(m, "%s command stream:\n", ring_str(ring));

	seq_printf(m, "  HEAD: 0x%08x\n", error->head[ring]);

	seq_printf(m, "  TAIL: 0x%08x\n", error->tail[ring]);

	seq_printf(m, "  CTL: 0x%08x\n", error->ctl[ring]);

	seq_printf(m, "  ACTHD: 0x%08x\n", error->acthd[ring]);

	seq_printf(m, "  IPEIR: 0x%08x\n", error->ipeir[ring]);

	seq_printf(m, "  IPEHR: 0x%08x\n", error->ipehr[ring]);
@@ -693,6 +694,8 @@ static int i915_error_state(struct seq_file *m, void *unused) 
	seq_printf(m, "EIR: 0x%08x\n", error->eir);

	seq_printf(m, "IER: 0x%08x\n", error->ier);

	seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);

	seq_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);

	seq_printf(m, "DERRMR: 0x%08x\n", error->derrmr);

	seq_printf(m, "CCID: 0x%08x\n", error->ccid);



	for (i = 0; i < dev_priv->num_fence_regs; i++)

drivers/gpu/drm/i915/i915_drv.h

+3 −0
Original line number Diff line number Diff line
@@ -188,10 +188,13 @@ struct drm_i915_error_state { 
	u32 pgtbl_er;

	u32 ier;

	u32 ccid;

	u32 derrmr;

	u32 forcewake;

	bool waiting[I915_NUM_RINGS];

	u32 pipestat[I915_MAX_PIPES];

	u32 tail[I915_NUM_RINGS];

	u32 head[I915_NUM_RINGS];

	u32 ctl[I915_NUM_RINGS];

	u32 ipeir[I915_NUM_RINGS];

	u32 ipehr[I915_NUM_RINGS];

	u32 instdone[I915_NUM_RINGS];

drivers/gpu/drm/i915/i915_gem_execbuffer.c

+21 −0
Original line number Diff line number Diff line
@@ -539,6 +539,8 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev, 
	total = 0;

	for (i = 0; i < count; i++) {

		struct drm_i915_gem_relocation_entry __user *user_relocs;

		u64 invalid_offset = (u64)-1;

		int j;



		user_relocs = (void __user *)(uintptr_t)exec[i].relocs_ptr;
@@ -549,6 +551,25 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev, 
			goto err;

		}



		/* As we do not update the known relocation offsets after

		 * relocating (due to the complexities in lock handling),

		 * we need to mark them as invalid now so that we force the

		 * relocation processing next time. Just in case the target

		 * object is evicted and then rebound into its old

		 * presumed_offset before the next execbuffer - if that

		 * happened we would make the mistake of assuming that the

		 * relocations were valid.

		 */

		for (j = 0; j < exec[i].relocation_count; j++) {

			if (copy_to_user(&user_relocs[j].presumed_offset,

					 &invalid_offset,

					 sizeof(invalid_offset))) {

				ret = -EFAULT;

				mutex_lock(&dev->struct_mutex);

				goto err;

			}

		}



		reloc_offset[i] = total;

		total += exec[i].relocation_count;

	}

drivers/gpu/drm/i915/i915_irq.c

+11 −0
Original line number Diff line number Diff line
@@ -1157,6 +1157,7 @@ static void i915_record_ring_state(struct drm_device *dev, 
	error->acthd[ring->id] = intel_ring_get_active_head(ring);

	error->head[ring->id] = I915_READ_HEAD(ring);

	error->tail[ring->id] = I915_READ_TAIL(ring);

	error->ctl[ring->id] = I915_READ_CTL(ring);



	error->cpu_ring_head[ring->id] = ring->head;

	error->cpu_ring_tail[ring->id] = ring->tail;
@@ -1251,6 +1252,16 @@ static void i915_capture_error_state(struct drm_device *dev) 
	else

		error->ier = I915_READ(IER);



	if (INTEL_INFO(dev)->gen >= 6)

		error->derrmr = I915_READ(DERRMR);



	if (IS_VALLEYVIEW(dev))

		error->forcewake = I915_READ(FORCEWAKE_VLV);

	else if (INTEL_INFO(dev)->gen >= 7)

		error->forcewake = I915_READ(FORCEWAKE_MT);

	else if (INTEL_INFO(dev)->gen == 6)

		error->forcewake = I915_READ(FORCEWAKE);



	for_each_pipe(pipe)

		error->pipestat[pipe] = I915_READ(PIPESTAT(pipe));

drivers/gpu/drm/i915/i915_reg.h

+2 −0
Original line number Diff line number Diff line
@@ -512,6 +512,8 @@ 
#define GEN7_ERR_INT	0x44040

#define   ERR_INT_MMIO_UNCLAIMED (1<<13)



#define DERRMR		0x44050



/* GM45+ chicken bits -- debug workaround bits that may be required

 * for various sorts of correct behavior.  The top 16 bits of each are

 * the enables for writing to the corresponding low bit.