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Commit fec0de11 authored by Sujith's avatar Sujith Committed by John W. Linville
Browse files

ath9k: Fix rd_ext EEPROM capability for AR9285 



AR9285 chipsets have a different EEPROM layout,
handle this appropriately when populating the rd_ext
capability.

Signed-off-by: default avatarSujith <Sujith.Manoharan@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent e421c7b3

drivers/net/wireless/ath9k/eeprom.h

+12 −0
Original line number Diff line number Diff line
@@ -78,6 +78,18 @@ 
#define INCREASE_MAXPOW_BY_TWO_CHAIN     6  /* 10*log10(2)*2 */

#define INCREASE_MAXPOW_BY_THREE_CHAIN   10 /* 10*log10(3)*2 */



/*

 * For AR9285 and later chipsets, the following bits are not being programmed

 * in EEPROM and so need to be enabled always.

 *

 * Bit 0: en_fcc_mid

 * Bit 1: en_jap_mid

 * Bit 2: en_fcc_dfs_ht40

 * Bit 3: en_jap_ht40

 * Bit 4: en_jap_dfs_ht40

 */

#define AR9285_RDEXT_DEFAULT    0x1F



#define AR_EEPROM_MAC(i)	(0x1d+(i))

#define ATH9K_POW_SM(_r, _s)	(((_r) & 0x3f) << (_s))

#define FREQ2FBIN(x, y)		((y) ? ((x) - 2300) : (((x) - 4800) / 5))

drivers/net/wireless/ath9k/hw.c

+2 −1
Original line number Diff line number Diff line
@@ -3128,10 +3128,11 @@ bool ath9k_hw_fill_cap_info(struct ath_hw *ah) 
	u16 capField = 0, eeval;



	eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_0);



	ah->regulatory.current_rd = eeval;



	eeval = ah->eep_ops->get_eeprom(ah, EEP_REG_1);

	if (AR_SREV_9285_10_OR_LATER(ah))

		eeval |= AR9285_RDEXT_DEFAULT;

	ah->regulatory.current_rd_ext = eeval;



	capField = ah->eep_ops->get_eeprom(ah, EEP_OP_CAP);