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Commit fe64d054 authored by Alexander Kurz's avatar Alexander Kurz Committed by Shawn Guo
Browse files

ARM: dts: imx50: imx50-esdhc use imx53-esdhc 



According to the reference manuals, both imx50/imx53 SOC seem to share
the same eSDHC controller, especially the section on "Multi-block Read"
mentioned in commit 361b8482 ("mmc: sdhci-esdhc-imx: fix multiblock
reads on i.MX53") is identical for both SOC.
Hence, let imx50 use imx53-esdhc.

Signed-off-by: default avatarAlexander Kurz <akurz@blala.de>
Reviewed-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 9f29183f

arch/arm/boot/dts/imx50.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -109,7 +109,7 @@ 
				ranges;



				esdhc1: esdhc@50004000 {

					compatible = "fsl,imx50-esdhc";

					compatible = "fsl,imx50-esdhc", "fsl,imx53-esdhc";

					reg = <0x50004000 0x4000>;

					interrupts = <1>;

					clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>,
@@ -121,7 +121,7 @@ 
				};



				esdhc2: esdhc@50008000 {

					compatible = "fsl,imx50-esdhc";

					compatible = "fsl,imx50-esdhc", "fsl,imx53-esdhc";

					reg = <0x50008000 0x4000>;

					interrupts = <2>;

					clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>,
@@ -170,7 +170,7 @@ 
				};



				esdhc3: esdhc@50020000 {

					compatible = "fsl,imx50-esdhc";

					compatible = "fsl,imx50-esdhc", "fsl,imx53-esdhc";

					reg = <0x50020000 0x4000>;

					interrupts = <3>;

					clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>,
@@ -182,7 +182,7 @@ 
				};



				esdhc4: esdhc@50024000 {

					compatible = "fsl,imx50-esdhc";

					compatible = "fsl,imx50-esdhc", "fsl,imx53-esdhc";

					reg = <0x50024000 0x4000>;

					interrupts = <4>;

					clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>,