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Commit fe2daa43 authored by Shivendra Kakrania's avatar Shivendra Kakrania
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ARM: dts: msm: Updating ddr bw range for video on sdm855 



Updating min & max Video DDR & LLC bw for video node on sdm855.

CRs-Fixed: 2209771
Change-Id: Id5a62b0fc3f91aead6ef564b57a52b3609e2dd24
Signed-off-by: default avatarShivendra Kakrania <shiven@codeaurora.org>
parent 84e6bbd6

arch/arm64/boot/dts/qcom/sdm855-vidc.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -60,7 +60,7 @@ 
			qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>;

			qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>;

			qcom,bus-governor = "performance";

			qcom,bus-range-kbps = <1000 100000000>;

			qcom,bus-range-kbps = <1000 6533000>;

		};

		arm9_bus_ddr {

			compatible = "qcom,msm-vidc,bus";
@@ -76,7 +76,7 @@ 
			qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>;

			qcom,bus-slave = <MSM_BUS_SLAVE_LLCC>;

			qcom,bus-governor = "performance";

			qcom,bus-range-kbps = <1000 100000000>;

			qcom,bus-range-kbps = <1000 1326000>;

		};



		/* MMUs */