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Commit fe0f5d08 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/disp/dp: fix some tx_pu mishandling



We only need to mask 0x0f on GM2xx, and want to keep the higher bits on
earlier cards.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent f10956d4
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+1 −1
Original line number Diff line number Diff line
@@ -125,7 +125,7 @@ g94_sor_dp_drv_ctl(struct nvkm_output_dp *outp, int ln, int vs, int pe, int pc)
		data[2] = (data[2] & ~0x0000ff00) | (ocfg.tx_pu << 8);
	nv_wr32(priv, 0x61c118 + loff, data[0] | (ocfg.dc << shift));
	nv_wr32(priv, 0x61c120 + loff, data[1] | (ocfg.pe << shift));
	nv_wr32(priv, 0x61c130 + loff, data[2] | (ocfg.tx_pu << 8));
	nv_wr32(priv, 0x61c130 + loff, data[2]);
	return 0;
}

+1 −1
Original line number Diff line number Diff line
@@ -102,7 +102,7 @@ gf110_sor_dp_drv_ctl(struct nvkm_output_dp *outp,
		data[2] = (data[2] & ~0x0000ff00) | (ocfg.tx_pu << 8);
	nv_wr32(priv, 0x61c118 + loff, data[0] | (ocfg.dc << shift));
	nv_wr32(priv, 0x61c120 + loff, data[1] | (ocfg.pe << shift));
	nv_wr32(priv, 0x61c130 + loff, data[2] | (ocfg.tx_pu << 8));
	nv_wr32(priv, 0x61c130 + loff, data[2]);
	data[3] = nv_rd32(priv, 0x61c13c + loff) & ~(0x000000ff << shift);
	nv_wr32(priv, 0x61c13c + loff, data[3] | (ocfg.pc << shift));
	return 0;
+4 −3
Original line number Diff line number Diff line
@@ -109,15 +109,16 @@ gm204_sor_dp_drv_ctl(struct nvkm_output_dp *outp,
				  &ver, &hdr, &cnt, &len, &ocfg);
	if (!addr)
		return -EINVAL;
	ocfg.tx_pu &= 0x0f;

	data[0] = nv_rd32(priv, 0x61c118 + loff) & ~(0x000000ff << shift);
	data[1] = nv_rd32(priv, 0x61c120 + loff) & ~(0x000000ff << shift);
	data[2] = nv_rd32(priv, 0x61c130 + loff);
	if ((data[2] & 0x0000ff00) < (ocfg.tx_pu << 8) || ln == 0)
		data[2] = (data[2] & ~0x0000ff00) | (ocfg.tx_pu << 8);
	if ((data[2] & 0x00000f00) < (ocfg.tx_pu << 8) || ln == 0)
		data[2] = (data[2] & ~0x00000f00) | (ocfg.tx_pu << 8);
	nv_wr32(priv, 0x61c118 + loff, data[0] | (ocfg.dc << shift));
	nv_wr32(priv, 0x61c120 + loff, data[1] | (ocfg.pe << shift));
	nv_wr32(priv, 0x61c130 + loff, data[2] | (ocfg.tx_pu << 8));
	nv_wr32(priv, 0x61c130 + loff, data[2]);
	data[3] = nv_rd32(priv, 0x61c13c + loff) & ~(0x000000ff << shift);
	nv_wr32(priv, 0x61c13c + loff, data[3] | (ocfg.pc << shift));
	return 0;
+1 −1
Original line number Diff line number Diff line
@@ -178,7 +178,7 @@ nvbios_dpcfg_parse(struct nvkm_bios *bios, u16 outp, u8 idx,
			info->pc    = nv_ro08(bios, data + 0x00);
			info->dc    = nv_ro08(bios, data + 0x01);
			info->pe    = nv_ro08(bios, data + 0x02);
			info->tx_pu = nv_ro08(bios, data + 0x03) & 0x0f;
			info->tx_pu = nv_ro08(bios, data + 0x03);
			break;
		default:
			data = 0x0000;