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Commit fdf24f2c authored Oct 30, 2018 by Pratham Pratap Committed by Gerrit - the friendly Code Review server Nov 03, 2018

ARM: dts: msm: Update value of QUSB2PHY_PORT_TUNE1 for SM6150



This change updates QUSB2PHY_PORT_TUNE1 register value from
0xf8 to 0xc8 for better electrical compliance results on SM6150.

Change-Id: I5873bafee48f7ae4188c8aebc25b0f969d86cf4b
Signed-off-by: Pratham Pratap <prathampratap@codeaurora.org>

parent 51683be8

arch/arm64/boot/dts/qcom/sm6150-qrd.dtsi

+1 −1

Original line number	Diff line number	Diff line
		@@ -251,7 +251,7 @@

		/* Primary USB port related High Speed PHY */
		&qusb_phy0 {
		qcom,qusb-phy-init-seq = <0xf8 0x80
		qcom,qusb-phy-init-seq = <0xc8 0x80
		0xb3 0x84
		0x83 0x88
		0x07 0x8c

arch/arm64/boot/dts/qcom/sm6150-usb.dtsi

+2 −2

Original line number	Diff line number	Diff line
		@@ -146,7 +146,7 @@
		qcom,vdd-voltage-level = <0 925000 975000>;
		qcom,tune2-efuse-bit-pos = <25>;
		qcom,tune2-efuse-num-bits = <4>;
		qcom,qusb-phy-init-seq = <0xf8 0x80
		qcom,qusb-phy-init-seq = <0xc8 0x80
		0xb3 0x84
		0x83 0x88
		0xc0 0x8c
		@@ -397,7 +397,7 @@
		vdda18-supply = <&pm6150_l11>;
		vdda33-supply = <&pm6150_l17>;
		qcom,vdd-voltage-level = <0 925000 975000>;
		qcom,qusb-phy-init-seq = <0xf8 0x80
		qcom,qusb-phy-init-seq = <0xc8 0x80
		0xb3 0x84
		0x83 0x88
		0xc0 0x8c