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Commit fda2d27d authored by Aneesh Kumar K.V's avatar Aneesh Kumar K.V Committed by Michael Ellerman
Browse files

powerpc/mm/hash: Always clear UPRT and Host Radix bits when setting up CPU 



We will set LPCR with correct value for radix during int. This make sure we
start with a sanitized value of LPCR. In case of kexec, cpus can have LPCR
value based on the previous translation mode we were running.

Fixes: fe036a06 ("powerpc/64/kexec: Fix MMU cleanup on radix")
Cc: stable@vger.kernel.org # v4.9+
Acked-by: default avatarMichael Neuling <mikey@neuling.org>
Signed-off-by: default avatarAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent f558b37b

arch/powerpc/kernel/cpu_setup_power.S

+4 −0
Original line number Diff line number Diff line
@@ -101,6 +101,8 @@ _GLOBAL(__setup_cpu_power9) 
	mfspr	r3,SPRN_LPCR

	LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE)

	or	r3, r3, r4

	LOAD_REG_IMMEDIATE(r4, LPCR_UPRT | LPCR_HR)

	andc	r3, r3, r4

	bl	__init_LPCR

	bl	__init_HFSCR

	bl	__init_tlb_power9
@@ -122,6 +124,8 @@ _GLOBAL(__restore_cpu_power9) 
	mfspr   r3,SPRN_LPCR

	LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE)

	or	r3, r3, r4

	LOAD_REG_IMMEDIATE(r4, LPCR_UPRT | LPCR_HR)

	andc	r3, r3, r4

	bl	__init_LPCR

	bl	__init_HFSCR

	bl	__init_tlb_power9