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Commit fd26031b authored by Antoine Tenart's avatar Antoine Tenart Committed by Sebastian Hesselbarth
Browse files

clk: berlin: drop direct of_iomap of nodes reg property 



The Berlin clock driver was sharing a DT node with the pin controller
and the reset driver. All these devices are now sub-nodes of the chip
controller. This patch rework the Berlin clock driver to allow moving
the Berlin clock DT bindings into their own sub-node of the chip
controller node.

Signed-off-by: default avatarAntoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
parent a457b86c

drivers/clk/berlin/bg2.c

+1 −8
Original line number Original line Diff line number Diff line
@@ -508,10 +508,7 @@ static void __init berlin2_clock_setup(struct device_node *np) 
	u8 avpll_flags = 0;

	u8 avpll_flags = 0;

	int n;

	int n;





	if (of_device_is_compatible(parent_np, "syscon"))

	gbase = of_iomap(parent_np, 0);

		np = parent_np;



	gbase = of_iomap(np, 0);

	if (!gbase)

	if (!gbase)

		return;

		return;
@@ -689,9 +686,5 @@ static void __init berlin2_clock_setup(struct device_node *np) 
bg2_fail:

bg2_fail:

	iounmap(gbase);

	iounmap(gbase);

}

}

CLK_OF_DECLARE(berlin2_clock, "marvell,berlin2-chip-ctrl",

	       berlin2_clock_setup);

CLK_OF_DECLARE(berlin2cd_clock, "marvell,berlin2cd-chip-ctrl",

	       berlin2_clock_setup);

CLK_OF_DECLARE(berlin2_clk, "marvell,berlin2-clk",

CLK_OF_DECLARE(berlin2_clk, "marvell,berlin2-clk",

	       berlin2_clock_setup);
 
	       berlin2_clock_setup);

drivers/clk/berlin/bg2q.c

+2 −7
Original line number Original line Diff line number Diff line
@@ -295,17 +295,14 @@ static void __init berlin2q_clock_setup(struct device_node *np) 
	struct clk *clk;

	struct clk *clk;

	int n;

	int n;





	if (of_device_is_compatible(parent_np, "syscon"))

	gbase = of_iomap(parent_np, 0);

		np = parent_np;



	gbase = of_iomap(np, 0);

	if (!gbase) {

	if (!gbase) {

		pr_err("%s: Unable to map global base\n", np->full_name);

		pr_err("%s: Unable to map global base\n", np->full_name);

		return;

		return;

	}

	}





	/* BG2Q CPU PLL is not part of global registers */

	/* BG2Q CPU PLL is not part of global registers */

	cpupll_base = of_iomap(np, 1);

	cpupll_base = of_iomap(parent_np, 1);

	if (!cpupll_base) {

	if (!cpupll_base) {

		pr_err("%s: Unable to map cpupll base\n", np->full_name);

		pr_err("%s: Unable to map cpupll base\n", np->full_name);

		iounmap(gbase);

		iounmap(gbase);
@@ -388,7 +385,5 @@ static void __init berlin2q_clock_setup(struct device_node *np) 
	iounmap(cpupll_base);

	iounmap(cpupll_base);

	iounmap(gbase);

	iounmap(gbase);

}

}

CLK_OF_DECLARE(berlin2q_clock, "marvell,berlin2q-chip-ctrl",

	       berlin2q_clock_setup);

CLK_OF_DECLARE(berlin2q_clk, "marvell,berlin2q-clk",

CLK_OF_DECLARE(berlin2q_clk, "marvell,berlin2q-clk",

	       berlin2q_clock_setup);
 
	       berlin2q_clock_setup);