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Commit fcee3895 authored by Stephen Rothwell's avatar Stephen Rothwell Committed by Linus Torvalds
Browse files

[PATCH] ppc64 iSeries: more header file white space cleanups 



This patch just contains white space and comment cleanups in the iSeries
headers files.  There are no semantic changes.

Signed-off-by: default avatarStephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 45dc76aa

include/asm-ppc64/iSeries/IoHriMainStore.h

+15 −18
Original line number Diff line number Diff line
@@ -161,7 +161,4 @@ struct IoHriMainStoreSegment5 { 
	u64	reserved3;

};







#endif // _IOHRIMAINSTORE_H

#endif	/* _IOHRIMAINSTORE_H */

include/asm-ppc64/iSeries/IoHriProcessorVpd.h

+13 −17
Original line number Diff line number Diff line
@@ -19,16 +19,12 @@ 
#ifndef _IOHRIPROCESSORVPD_H

#define _IOHRIPROCESSORVPD_H



//===================================================================

//

//	This struct maps Processor Vpd that is DMAd to SLIC by CSP 

//



#include <asm/types.h>



struct IoHriProcessorVpd

{



/*

 * This struct maps Processor Vpd that is DMAd to SLIC by CSP

 */

struct IoHriProcessorVpd {

	u8	xFormat;		// VPD format indicator		x00-x00

	u8	xProcStatus:8;		// Processor State		x01-x01

	u8	xSecondaryThreadCount;	// Secondary thread cnt		x02-x02

include/asm-ppc64/iSeries/ItExtVpdPanel.h

+22 −30
Original line number Diff line number Diff line
@@ -20,24 +20,16 @@ 
#define _ITEXTVPDPANEL_H



/*

 *

 *	This struct maps the panel information

 *

 * Warning:

 *	This data must match the architecture for the panel information

 *

 */





/*-------------------------------------------------------------------

 * Standard Includes

 *------------------------------------------------------------------- 

*/

#include <asm/types.h>



struct ItExtVpdPanel

{

  // Definition of the Extended Vpd On Panel Data Area

struct ItExtVpdPanel {

	/* Definition of the Extended Vpd On Panel Data Area */

	char	systemSerial[8];

	char	mfgID[4];

	char	reserved1[24];

include/asm-ppc64/iSeries/ItIplParmsReal.h

+45 −52
Original line number Diff line number Diff line
@@ -19,24 +19,17 @@ 
#ifndef _ITIPLPARMSREAL_H

#define _ITIPLPARMSREAL_H



//==============================================================================

//

//	This struct maps the IPL Parameters DMA'd from the SP.                  

//

// Warning:

//	This data must map in exactly 64 bytes and match the architecture for

//	the IPL parms

//

//=============================================================================



/*

 *	This struct maps the IPL Parameters DMA'd from the SP.

 *

 * Warning:

 *	This data must map in exactly 64 bytes and match the architecture for

 *	the IPL parms

 */



//-------------------------------------------------------------------

// Standard Includes

//-------------------------------------------------------------------

#include <asm/types.h>



struct ItIplParmsReal

{

struct ItIplParmsReal {

	u8	xFormat;		// Defines format of IplParms	x00-x00

	u8	xRsvd01:6;		// Reserved			x01-x01

	u8	xAlternateSearch:1;	// Alternate search indicator	...

include/asm-ppc64/iSeries/ItLpNaca.h

+15 −27
Original line number Diff line number Diff line
@@ -19,18 +19,13 @@ 
#ifndef _ITLPNACA_H

#define _ITLPNACA_H



//=============================================================================

//

//	This control block contains the data that is shared between the

//	hypervisor (PLIC) and the OS.

//

//=============================================================================

/*

 *	This control block contains the data that is shared between the

 *	hypervisor (PLIC) and the OS.

 */



struct ItLpNaca

{

//=============================================================================

struct ItLpNaca {

// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data

//=============================================================================

	u32	xDesc;			// Eye catcher			x00-x03

	u16	xSize;			// Size of this class		x04-x05

	u16	xIntHdlrOffset;		// Offset to IntHdlr array	x06-x07
@@ -64,25 +59,18 @@ struct ItLpNaca 
	u64	xSlicSegmentTablePtr;	// Pointer to Slic seg table.   x38-x3f

	u8	xRsvd1_4[64];		//				x40-x7F



//=============================================================================

// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data

//=============================================================================

	u8	xRsvd2_0[128];		// Reserved			x00-x7F



//=============================================================================

// CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators

// NB: Padding required to keep xInterrruptHdlr at x300 which is required

// for v4r4 PLIC.

//=============================================================================

	u8	xOldLpQueue[128];	// LP Queue needed for v4r4	100-17F

	u8	xRsvd3_0[384];		// Reserved			180-2FF

//=============================================================================



// CACHE_LINE_7-8 0x0300 - 0x03FF Contains the address of the OS interrupt

//  handlers

//=============================================================================

	u64	xInterruptHdlr[32];	// Interrupt handlers		300-x3FF

};



//=============================================================================



#endif /* _ITLPNACA_H */