Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit fc986034 authored by Niels Ole Salscheider's avatar Niels Ole Salscheider Committed by Alex Deucher
Browse files

drm/radeon: Fix VRAM size calculation for VRAM >= 4GB 



Add ULL prefix to avoid overflow.

Signed-off-by: default avatarNiels Ole Salscheider <niels_ole@salscheider-online.de>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent 6ab76310

drivers/gpu/drm/radeon/evergreen.c

+2 −2
Original line number Diff line number Diff line
@@ -3405,8 +3405,8 @@ int evergreen_mc_init(struct radeon_device *rdev) 
		rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);

	} else {

		/* size in MB on evergreen/cayman/tn */

		rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;

		rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;

		rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;

		rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;

	}

	rdev->mc.visible_vram_size = rdev->mc.aper_size;

	r700_vram_gtt_location(rdev, &rdev->mc);

drivers/gpu/drm/radeon/radeon_ttm.c

+1 −1
Original line number Diff line number Diff line
@@ -726,7 +726,7 @@ int radeon_ttm_init(struct radeon_device *rdev) 
		return r;

	}

	DRM_INFO("radeon: %uM of VRAM memory ready\n",

		 (unsigned)rdev->mc.real_vram_size / (1024 * 1024));

		 (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));

	r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,

				rdev->mc.gtt_size >> PAGE_SHIFT);

	if (r) {

drivers/gpu/drm/radeon/si.c

+2 −2
Original line number Diff line number Diff line
@@ -3397,8 +3397,8 @@ static int si_mc_init(struct radeon_device *rdev) 
	rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);

	rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);

	/* size in MB on si */

	rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;

	rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;

	rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;

	rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL;

	rdev->mc.visible_vram_size = rdev->mc.aper_size;

	si_vram_gtt_location(rdev, &rdev->mc);

	radeon_update_bandwidth_info(rdev);