Loading drivers/gpu/drm/i915/i915_dma.c +144 −160 Original line number Diff line number Diff line Loading @@ -1396,152 +1396,12 @@ static void i915_ironlake_get_mem_freq(struct drm_device *dev) } } struct v_table { u8 vid; unsigned long vd; /* in .1 mil */ unsigned long vm; /* in .1 mil */ u8 pvid; }; static struct v_table v_table[] = { { 0, 16125, 15000, 0x7f, }, { 1, 16000, 14875, 0x7e, }, { 2, 15875, 14750, 0x7d, }, { 3, 15750, 14625, 0x7c, }, { 4, 15625, 14500, 0x7b, }, { 5, 15500, 14375, 0x7a, }, { 6, 15375, 14250, 0x79, }, { 7, 15250, 14125, 0x78, }, { 8, 15125, 14000, 0x77, }, { 9, 15000, 13875, 0x76, }, { 10, 14875, 13750, 0x75, }, { 11, 14750, 13625, 0x74, }, { 12, 14625, 13500, 0x73, }, { 13, 14500, 13375, 0x72, }, { 14, 14375, 13250, 0x71, }, { 15, 14250, 13125, 0x70, }, { 16, 14125, 13000, 0x6f, }, { 17, 14000, 12875, 0x6e, }, { 18, 13875, 12750, 0x6d, }, { 19, 13750, 12625, 0x6c, }, { 20, 13625, 12500, 0x6b, }, { 21, 13500, 12375, 0x6a, }, { 22, 13375, 12250, 0x69, }, { 23, 13250, 12125, 0x68, }, { 24, 13125, 12000, 0x67, }, { 25, 13000, 11875, 0x66, }, { 26, 12875, 11750, 0x65, }, { 27, 12750, 11625, 0x64, }, { 28, 12625, 11500, 0x63, }, { 29, 12500, 11375, 0x62, }, { 30, 12375, 11250, 0x61, }, { 31, 12250, 11125, 0x60, }, { 32, 12125, 11000, 0x5f, }, { 33, 12000, 10875, 0x5e, }, { 34, 11875, 10750, 0x5d, }, { 35, 11750, 10625, 0x5c, }, { 36, 11625, 10500, 0x5b, }, { 37, 11500, 10375, 0x5a, }, { 38, 11375, 10250, 0x59, }, { 39, 11250, 10125, 0x58, }, { 40, 11125, 10000, 0x57, }, { 41, 11000, 9875, 0x56, }, { 42, 10875, 9750, 0x55, }, { 43, 10750, 9625, 0x54, }, { 44, 10625, 9500, 0x53, }, { 45, 10500, 9375, 0x52, }, { 46, 10375, 9250, 0x51, }, { 47, 10250, 9125, 0x50, }, { 48, 10125, 9000, 0x4f, }, { 49, 10000, 8875, 0x4e, }, { 50, 9875, 8750, 0x4d, }, { 51, 9750, 8625, 0x4c, }, { 52, 9625, 8500, 0x4b, }, { 53, 9500, 8375, 0x4a, }, { 54, 9375, 8250, 0x49, }, { 55, 9250, 8125, 0x48, }, { 56, 9125, 8000, 0x47, }, { 57, 9000, 7875, 0x46, }, { 58, 8875, 7750, 0x45, }, { 59, 8750, 7625, 0x44, }, { 60, 8625, 7500, 0x43, }, { 61, 8500, 7375, 0x42, }, { 62, 8375, 7250, 0x41, }, { 63, 8250, 7125, 0x40, }, { 64, 8125, 7000, 0x3f, }, { 65, 8000, 6875, 0x3e, }, { 66, 7875, 6750, 0x3d, }, { 67, 7750, 6625, 0x3c, }, { 68, 7625, 6500, 0x3b, }, { 69, 7500, 6375, 0x3a, }, { 70, 7375, 6250, 0x39, }, { 71, 7250, 6125, 0x38, }, { 72, 7125, 6000, 0x37, }, { 73, 7000, 5875, 0x36, }, { 74, 6875, 5750, 0x35, }, { 75, 6750, 5625, 0x34, }, { 76, 6625, 5500, 0x33, }, { 77, 6500, 5375, 0x32, }, { 78, 6375, 5250, 0x31, }, { 79, 6250, 5125, 0x30, }, { 80, 6125, 5000, 0x2f, }, { 81, 6000, 4875, 0x2e, }, { 82, 5875, 4750, 0x2d, }, { 83, 5750, 4625, 0x2c, }, { 84, 5625, 4500, 0x2b, }, { 85, 5500, 4375, 0x2a, }, { 86, 5375, 4250, 0x29, }, { 87, 5250, 4125, 0x28, }, { 88, 5125, 4000, 0x27, }, { 89, 5000, 3875, 0x26, }, { 90, 4875, 3750, 0x25, }, { 91, 4750, 3625, 0x24, }, { 92, 4625, 3500, 0x23, }, { 93, 4500, 3375, 0x22, }, { 94, 4375, 3250, 0x21, }, { 95, 4250, 3125, 0x20, }, { 96, 4125, 3000, 0x1f, }, { 97, 4125, 3000, 0x1e, }, { 98, 4125, 3000, 0x1d, }, { 99, 4125, 3000, 0x1c, }, { 100, 4125, 3000, 0x1b, }, { 101, 4125, 3000, 0x1a, }, { 102, 4125, 3000, 0x19, }, { 103, 4125, 3000, 0x18, }, { 104, 4125, 3000, 0x17, }, { 105, 4125, 3000, 0x16, }, { 106, 4125, 3000, 0x15, }, { 107, 4125, 3000, 0x14, }, { 108, 4125, 3000, 0x13, }, { 109, 4125, 3000, 0x12, }, { 110, 4125, 3000, 0x11, }, { 111, 4125, 3000, 0x10, }, { 112, 4125, 3000, 0x0f, }, { 113, 4125, 3000, 0x0e, }, { 114, 4125, 3000, 0x0d, }, { 115, 4125, 3000, 0x0c, }, { 116, 4125, 3000, 0x0b, }, { 117, 4125, 3000, 0x0a, }, { 118, 4125, 3000, 0x09, }, { 119, 4125, 3000, 0x08, }, { 120, 1125, 0, 0x07, }, { 121, 1000, 0, 0x06, }, { 122, 875, 0, 0x05, }, { 123, 750, 0, 0x04, }, { 124, 625, 0, 0x03, }, { 125, 500, 0, 0x02, }, { 126, 375, 0, 0x01, }, { 127, 0, 0, 0x00, }, }; struct cparams { int i; int t; int m; int c; }; static struct cparams cparams[] = { static const struct cparams { u16 i; u16 t; u16 m; u16 c; } cparams[] = { { 1, 1333, 301, 28664 }, { 1, 1066, 294, 24460 }, { 1, 800, 294, 25192 }, Loading Loading @@ -1607,21 +1467,145 @@ unsigned long i915_mch_val(struct drm_i915_private *dev_priv) return ((m * x) / 127) - b; } static unsigned long pvid_to_extvid(struct drm_i915_private *dev_priv, u8 pxvid) static u16 pvid_to_extvid(struct drm_i915_private *dev_priv, u8 pxvid) { unsigned long val = 0; int i; for (i = 0; i < ARRAY_SIZE(v_table); i++) { if (v_table[i].pvid == pxvid) { if (IS_MOBILE(dev_priv->dev)) val = v_table[i].vm; static const struct v_table { u16 vd; /* in .1 mil */ u16 vm; /* in .1 mil */ } v_table[] = { { 0, 0, }, { 375, 0, }, { 500, 0, }, { 625, 0, }, { 750, 0, }, { 875, 0, }, { 1000, 0, }, { 1125, 0, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4250, 3125, }, { 4375, 3250, }, { 4500, 3375, }, { 4625, 3500, }, { 4750, 3625, }, { 4875, 3750, }, { 5000, 3875, }, { 5125, 4000, }, { 5250, 4125, }, { 5375, 4250, }, { 5500, 4375, }, { 5625, 4500, }, { 5750, 4625, }, { 5875, 4750, }, { 6000, 4875, }, { 6125, 5000, }, { 6250, 5125, }, { 6375, 5250, }, { 6500, 5375, }, { 6625, 5500, }, { 6750, 5625, }, { 6875, 5750, }, { 7000, 5875, }, { 7125, 6000, }, { 7250, 6125, }, { 7375, 6250, }, { 7500, 6375, }, { 7625, 6500, }, { 7750, 6625, }, { 7875, 6750, }, { 8000, 6875, }, { 8125, 7000, }, { 8250, 7125, }, { 8375, 7250, }, { 8500, 7375, }, { 8625, 7500, }, { 8750, 7625, }, { 8875, 7750, }, { 9000, 7875, }, { 9125, 8000, }, { 9250, 8125, }, { 9375, 8250, }, { 9500, 8375, }, { 9625, 8500, }, { 9750, 8625, }, { 9875, 8750, }, { 10000, 8875, }, { 10125, 9000, }, { 10250, 9125, }, { 10375, 9250, }, { 10500, 9375, }, { 10625, 9500, }, { 10750, 9625, }, { 10875, 9750, }, { 11000, 9875, }, { 11125, 10000, }, { 11250, 10125, }, { 11375, 10250, }, { 11500, 10375, }, { 11625, 10500, }, { 11750, 10625, }, { 11875, 10750, }, { 12000, 10875, }, { 12125, 11000, }, { 12250, 11125, }, { 12375, 11250, }, { 12500, 11375, }, { 12625, 11500, }, { 12750, 11625, }, { 12875, 11750, }, { 13000, 11875, }, { 13125, 12000, }, { 13250, 12125, }, { 13375, 12250, }, { 13500, 12375, }, { 13625, 12500, }, { 13750, 12625, }, { 13875, 12750, }, { 14000, 12875, }, { 14125, 13000, }, { 14250, 13125, }, { 14375, 13250, }, { 14500, 13375, }, { 14625, 13500, }, { 14750, 13625, }, { 14875, 13750, }, { 15000, 13875, }, { 15125, 14000, }, { 15250, 14125, }, { 15375, 14250, }, { 15500, 14375, }, { 15625, 14500, }, { 15750, 14625, }, { 15875, 14750, }, { 16000, 14875, }, { 16125, 15000, }, }; if (dev_priv->info->is_mobile) return v_table[pxvid].vm; else val = v_table[i].vd; } } return val; return v_table[pxvid].vd; } void i915_update_gfx_val(struct drm_i915_private *dev_priv) Loading Loading
drivers/gpu/drm/i915/i915_dma.c +144 −160 Original line number Diff line number Diff line Loading @@ -1396,152 +1396,12 @@ static void i915_ironlake_get_mem_freq(struct drm_device *dev) } } struct v_table { u8 vid; unsigned long vd; /* in .1 mil */ unsigned long vm; /* in .1 mil */ u8 pvid; }; static struct v_table v_table[] = { { 0, 16125, 15000, 0x7f, }, { 1, 16000, 14875, 0x7e, }, { 2, 15875, 14750, 0x7d, }, { 3, 15750, 14625, 0x7c, }, { 4, 15625, 14500, 0x7b, }, { 5, 15500, 14375, 0x7a, }, { 6, 15375, 14250, 0x79, }, { 7, 15250, 14125, 0x78, }, { 8, 15125, 14000, 0x77, }, { 9, 15000, 13875, 0x76, }, { 10, 14875, 13750, 0x75, }, { 11, 14750, 13625, 0x74, }, { 12, 14625, 13500, 0x73, }, { 13, 14500, 13375, 0x72, }, { 14, 14375, 13250, 0x71, }, { 15, 14250, 13125, 0x70, }, { 16, 14125, 13000, 0x6f, }, { 17, 14000, 12875, 0x6e, }, { 18, 13875, 12750, 0x6d, }, { 19, 13750, 12625, 0x6c, }, { 20, 13625, 12500, 0x6b, }, { 21, 13500, 12375, 0x6a, }, { 22, 13375, 12250, 0x69, }, { 23, 13250, 12125, 0x68, }, { 24, 13125, 12000, 0x67, }, { 25, 13000, 11875, 0x66, }, { 26, 12875, 11750, 0x65, }, { 27, 12750, 11625, 0x64, }, { 28, 12625, 11500, 0x63, }, { 29, 12500, 11375, 0x62, }, { 30, 12375, 11250, 0x61, }, { 31, 12250, 11125, 0x60, }, { 32, 12125, 11000, 0x5f, }, { 33, 12000, 10875, 0x5e, }, { 34, 11875, 10750, 0x5d, }, { 35, 11750, 10625, 0x5c, }, { 36, 11625, 10500, 0x5b, }, { 37, 11500, 10375, 0x5a, }, { 38, 11375, 10250, 0x59, }, { 39, 11250, 10125, 0x58, }, { 40, 11125, 10000, 0x57, }, { 41, 11000, 9875, 0x56, }, { 42, 10875, 9750, 0x55, }, { 43, 10750, 9625, 0x54, }, { 44, 10625, 9500, 0x53, }, { 45, 10500, 9375, 0x52, }, { 46, 10375, 9250, 0x51, }, { 47, 10250, 9125, 0x50, }, { 48, 10125, 9000, 0x4f, }, { 49, 10000, 8875, 0x4e, }, { 50, 9875, 8750, 0x4d, }, { 51, 9750, 8625, 0x4c, }, { 52, 9625, 8500, 0x4b, }, { 53, 9500, 8375, 0x4a, }, { 54, 9375, 8250, 0x49, }, { 55, 9250, 8125, 0x48, }, { 56, 9125, 8000, 0x47, }, { 57, 9000, 7875, 0x46, }, { 58, 8875, 7750, 0x45, }, { 59, 8750, 7625, 0x44, }, { 60, 8625, 7500, 0x43, }, { 61, 8500, 7375, 0x42, }, { 62, 8375, 7250, 0x41, }, { 63, 8250, 7125, 0x40, }, { 64, 8125, 7000, 0x3f, }, { 65, 8000, 6875, 0x3e, }, { 66, 7875, 6750, 0x3d, }, { 67, 7750, 6625, 0x3c, }, { 68, 7625, 6500, 0x3b, }, { 69, 7500, 6375, 0x3a, }, { 70, 7375, 6250, 0x39, }, { 71, 7250, 6125, 0x38, }, { 72, 7125, 6000, 0x37, }, { 73, 7000, 5875, 0x36, }, { 74, 6875, 5750, 0x35, }, { 75, 6750, 5625, 0x34, }, { 76, 6625, 5500, 0x33, }, { 77, 6500, 5375, 0x32, }, { 78, 6375, 5250, 0x31, }, { 79, 6250, 5125, 0x30, }, { 80, 6125, 5000, 0x2f, }, { 81, 6000, 4875, 0x2e, }, { 82, 5875, 4750, 0x2d, }, { 83, 5750, 4625, 0x2c, }, { 84, 5625, 4500, 0x2b, }, { 85, 5500, 4375, 0x2a, }, { 86, 5375, 4250, 0x29, }, { 87, 5250, 4125, 0x28, }, { 88, 5125, 4000, 0x27, }, { 89, 5000, 3875, 0x26, }, { 90, 4875, 3750, 0x25, }, { 91, 4750, 3625, 0x24, }, { 92, 4625, 3500, 0x23, }, { 93, 4500, 3375, 0x22, }, { 94, 4375, 3250, 0x21, }, { 95, 4250, 3125, 0x20, }, { 96, 4125, 3000, 0x1f, }, { 97, 4125, 3000, 0x1e, }, { 98, 4125, 3000, 0x1d, }, { 99, 4125, 3000, 0x1c, }, { 100, 4125, 3000, 0x1b, }, { 101, 4125, 3000, 0x1a, }, { 102, 4125, 3000, 0x19, }, { 103, 4125, 3000, 0x18, }, { 104, 4125, 3000, 0x17, }, { 105, 4125, 3000, 0x16, }, { 106, 4125, 3000, 0x15, }, { 107, 4125, 3000, 0x14, }, { 108, 4125, 3000, 0x13, }, { 109, 4125, 3000, 0x12, }, { 110, 4125, 3000, 0x11, }, { 111, 4125, 3000, 0x10, }, { 112, 4125, 3000, 0x0f, }, { 113, 4125, 3000, 0x0e, }, { 114, 4125, 3000, 0x0d, }, { 115, 4125, 3000, 0x0c, }, { 116, 4125, 3000, 0x0b, }, { 117, 4125, 3000, 0x0a, }, { 118, 4125, 3000, 0x09, }, { 119, 4125, 3000, 0x08, }, { 120, 1125, 0, 0x07, }, { 121, 1000, 0, 0x06, }, { 122, 875, 0, 0x05, }, { 123, 750, 0, 0x04, }, { 124, 625, 0, 0x03, }, { 125, 500, 0, 0x02, }, { 126, 375, 0, 0x01, }, { 127, 0, 0, 0x00, }, }; struct cparams { int i; int t; int m; int c; }; static struct cparams cparams[] = { static const struct cparams { u16 i; u16 t; u16 m; u16 c; } cparams[] = { { 1, 1333, 301, 28664 }, { 1, 1066, 294, 24460 }, { 1, 800, 294, 25192 }, Loading Loading @@ -1607,21 +1467,145 @@ unsigned long i915_mch_val(struct drm_i915_private *dev_priv) return ((m * x) / 127) - b; } static unsigned long pvid_to_extvid(struct drm_i915_private *dev_priv, u8 pxvid) static u16 pvid_to_extvid(struct drm_i915_private *dev_priv, u8 pxvid) { unsigned long val = 0; int i; for (i = 0; i < ARRAY_SIZE(v_table); i++) { if (v_table[i].pvid == pxvid) { if (IS_MOBILE(dev_priv->dev)) val = v_table[i].vm; static const struct v_table { u16 vd; /* in .1 mil */ u16 vm; /* in .1 mil */ } v_table[] = { { 0, 0, }, { 375, 0, }, { 500, 0, }, { 625, 0, }, { 750, 0, }, { 875, 0, }, { 1000, 0, }, { 1125, 0, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4125, 3000, }, { 4250, 3125, }, { 4375, 3250, }, { 4500, 3375, }, { 4625, 3500, }, { 4750, 3625, }, { 4875, 3750, }, { 5000, 3875, }, { 5125, 4000, }, { 5250, 4125, }, { 5375, 4250, }, { 5500, 4375, }, { 5625, 4500, }, { 5750, 4625, }, { 5875, 4750, }, { 6000, 4875, }, { 6125, 5000, }, { 6250, 5125, }, { 6375, 5250, }, { 6500, 5375, }, { 6625, 5500, }, { 6750, 5625, }, { 6875, 5750, }, { 7000, 5875, }, { 7125, 6000, }, { 7250, 6125, }, { 7375, 6250, }, { 7500, 6375, }, { 7625, 6500, }, { 7750, 6625, }, { 7875, 6750, }, { 8000, 6875, }, { 8125, 7000, }, { 8250, 7125, }, { 8375, 7250, }, { 8500, 7375, }, { 8625, 7500, }, { 8750, 7625, }, { 8875, 7750, }, { 9000, 7875, }, { 9125, 8000, }, { 9250, 8125, }, { 9375, 8250, }, { 9500, 8375, }, { 9625, 8500, }, { 9750, 8625, }, { 9875, 8750, }, { 10000, 8875, }, { 10125, 9000, }, { 10250, 9125, }, { 10375, 9250, }, { 10500, 9375, }, { 10625, 9500, }, { 10750, 9625, }, { 10875, 9750, }, { 11000, 9875, }, { 11125, 10000, }, { 11250, 10125, }, { 11375, 10250, }, { 11500, 10375, }, { 11625, 10500, }, { 11750, 10625, }, { 11875, 10750, }, { 12000, 10875, }, { 12125, 11000, }, { 12250, 11125, }, { 12375, 11250, }, { 12500, 11375, }, { 12625, 11500, }, { 12750, 11625, }, { 12875, 11750, }, { 13000, 11875, }, { 13125, 12000, }, { 13250, 12125, }, { 13375, 12250, }, { 13500, 12375, }, { 13625, 12500, }, { 13750, 12625, }, { 13875, 12750, }, { 14000, 12875, }, { 14125, 13000, }, { 14250, 13125, }, { 14375, 13250, }, { 14500, 13375, }, { 14625, 13500, }, { 14750, 13625, }, { 14875, 13750, }, { 15000, 13875, }, { 15125, 14000, }, { 15250, 14125, }, { 15375, 14250, }, { 15500, 14375, }, { 15625, 14500, }, { 15750, 14625, }, { 15875, 14750, }, { 16000, 14875, }, { 16125, 15000, }, }; if (dev_priv->info->is_mobile) return v_table[pxvid].vm; else val = v_table[i].vd; } } return val; return v_table[pxvid].vd; } void i915_update_gfx_val(struct drm_i915_private *dev_priv) Loading